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authorPhilip, Avinash <avinashphilip@ti.com>2012-08-23 12:29:46 +0530
committerThierry Reding <thierry.reding@avionic-design.de>2012-09-10 17:03:13 +0200
commitc06fad9d28c95b024ea10455cf1397432b12848d (patch)
treebce6aa75bb13e74de89dd803720dd7b32924c4fe /drivers/pwm
parentb817bf5c72774556345a9043c6b0c497cdcb7295 (diff)
downloadop-kernel-dev-c06fad9d28c95b024ea10455cf1397432b12848d.zip
op-kernel-dev-c06fad9d28c95b024ea10455cf1397432b12848d.tar.gz
pwm: pwm-tiecap: Disable APWM mode after configure
APWM mode is enabled while configuring PWM device. This was done to handle shadow & immediate mode update of period and compare registers. However, leaving it enabled after configuring will cause APWM output on PWM pin even before enabling PWM device. Fix the same by disabling APWM mode after configuring if PWM device is not running. Signed-off-by: Philip, Avinash <avinashphilip@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Diffstat (limited to 'drivers/pwm')
-rw-r--r--drivers/pwm/pwm-tiecap.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-tiecap.c b/drivers/pwm/pwm-tiecap.c
index 0b66d0f..4b66889 100644
--- a/drivers/pwm/pwm-tiecap.c
+++ b/drivers/pwm/pwm-tiecap.c
@@ -100,6 +100,13 @@ static int ecap_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
writel(period_cycles, pc->mmio_base + CAP3);
}
+ if (!test_bit(PWMF_ENABLED, &pwm->flags)) {
+ reg_val = readw(pc->mmio_base + ECCTL2);
+ /* Disable APWM mode to put APWM output Low */
+ reg_val &= ~ECCTL2_APWM_MODE;
+ writew(reg_val, pc->mmio_base + ECCTL2);
+ }
+
pm_runtime_put_sync(pc->chip.dev);
return 0;
}
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