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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2013-09-28 03:07:21 +0400
committerLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>2013-10-27 16:40:51 +0100
commit24799c22aea81a8890a66e101cd5a3b175980777 (patch)
tree4c77e5899310bd5157af70f35455485603424954 /drivers/pinctrl
parentc6ce2b6bffe5740d572fdc5b5e690d5261abee51 (diff)
downloadop-kernel-dev-24799c22aea81a8890a66e101cd5a3b175980777.zip
op-kernel-dev-24799c22aea81a8890a66e101cd5a3b175980777.tar.gz
sh-pfc: r8a7778: Add CAN pin groups
Add CAN data and clock pin groups to R8A7778 PFC driver. Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Diffstat (limited to 'drivers/pinctrl')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7778.c55
1 files changed, 55 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
index 20b1d0d..8b1881c 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7778.c
@@ -1304,6 +1304,33 @@ AUDIO_PFC_DAT(audio_clkout_a, AUDIO_CLKOUT_A);
AUDIO_PFC_PIN(audio_clkout_b, RCAR_GP_PIN(1, 16));
AUDIO_PFC_DAT(audio_clkout_b, AUDIO_CLKOUT_B);
+/* - CAN macro --------_----------------------------------------------------- */
+#define CAN_PFC_PINS(name, args...) SH_PFC_PINS(name, args)
+#define CAN_PFC_DATA(name, tx, rx) SH_PFC_MUX2(name, tx, rx)
+#define CAN_PFC_CLK(name, clk) SH_PFC_MUX1(name, clk)
+
+/* - CAN0 ------------------------------------------------------------------- */
+CAN_PFC_PINS(can0_data_a, RCAR_GP_PIN(1, 30), RCAR_GP_PIN(1, 31));
+CAN_PFC_DATA(can0_data_a, CAN0_TX_A, CAN0_RX_A);
+CAN_PFC_PINS(can0_data_b, RCAR_GP_PIN(2, 26), RCAR_GP_PIN(2, 27));
+CAN_PFC_DATA(can0_data_b, CAN0_TX_B, CAN0_RX_B);
+
+/* - CAN1 ------------------------------------------------------------------- */
+CAN_PFC_PINS(can1_data_a, RCAR_GP_PIN(4, 20), RCAR_GP_PIN(4, 19));
+CAN_PFC_DATA(can1_data_a, CAN1_TX_A, CAN1_RX_A);
+CAN_PFC_PINS(can1_data_b, RCAR_GP_PIN(2, 28), RCAR_GP_PIN(2, 29));
+CAN_PFC_DATA(can1_data_b, CAN1_TX_B, CAN1_RX_B);
+
+/* - CAN_CLK --------------------------------------------------------------- */
+CAN_PFC_PINS(can_clk_a, RCAR_GP_PIN(3, 24));
+CAN_PFC_CLK(can_clk_a, CAN_CLK_A);
+CAN_PFC_PINS(can_clk_b, RCAR_GP_PIN(1, 16));
+CAN_PFC_CLK(can_clk_b, CAN_CLK_B);
+CAN_PFC_PINS(can_clk_c, RCAR_GP_PIN(4, 24));
+CAN_PFC_CLK(can_clk_c, CAN_CLK_C);
+CAN_PFC_PINS(can_clk_d, RCAR_GP_PIN(2, 25));
+CAN_PFC_CLK(can_clk_d, CAN_CLK_D);
+
/* - Ether ------------------------------------------------------------------ */
SH_PFC_PINS(ether_rmii, RCAR_GP_PIN(4, 10), RCAR_GP_PIN(4, 11),
RCAR_GP_PIN(4, 13), RCAR_GP_PIN(4, 9),
@@ -1698,6 +1725,14 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
SH_PFC_PIN_GROUP(audio_clk_c),
SH_PFC_PIN_GROUP(audio_clkout_a),
SH_PFC_PIN_GROUP(audio_clkout_b),
+ SH_PFC_PIN_GROUP(can0_data_a),
+ SH_PFC_PIN_GROUP(can0_data_b),
+ SH_PFC_PIN_GROUP(can1_data_a),
+ SH_PFC_PIN_GROUP(can1_data_b),
+ SH_PFC_PIN_GROUP(can_clk_a),
+ SH_PFC_PIN_GROUP(can_clk_b),
+ SH_PFC_PIN_GROUP(can_clk_c),
+ SH_PFC_PIN_GROUP(can_clk_d),
SH_PFC_PIN_GROUP(ether_rmii),
SH_PFC_PIN_GROUP(ether_link),
SH_PFC_PIN_GROUP(ether_magic),
@@ -1826,6 +1861,24 @@ static const char * const audio_clk_groups[] = {
"audio_clkout_b",
};
+static const char * const can0_groups[] = {
+ "can0_data_a",
+ "can0_data_b",
+ "can_clk_a",
+ "can_clk_b",
+ "can_clk_c",
+ "can_clk_d",
+};
+
+static const char * const can1_groups[] = {
+ "can1_data_a",
+ "can1_data_b",
+ "can_clk_a",
+ "can_clk_b",
+ "can_clk_c",
+ "can_clk_d",
+};
+
static const char * const ether_groups[] = {
"ether_rmii",
"ether_link",
@@ -2022,6 +2075,8 @@ static const char * const vin1_groups[] = {
static const struct sh_pfc_function pinmux_functions[] = {
SH_PFC_FUNCTION(audio_clk),
+ SH_PFC_FUNCTION(can0),
+ SH_PFC_FUNCTION(can1),
SH_PFC_FUNCTION(ether),
SH_PFC_FUNCTION(hscif0),
SH_PFC_FUNCTION(hscif1),
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