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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-04-26 22:28:54 +0200
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-05-04 19:57:18 -0500
commitdc9691066fa7de51178de5ac3e06b3681557a7b4 (patch)
tree5ecbae5cf4632b76b97eb6988c374c6e2970cea5 /drivers/pinctrl/sunxi
parent340ba6c4973184e2a9a7c51b295230fec17d1109 (diff)
downloadop-kernel-dev-dc9691066fa7de51178de5ac3e06b3681557a7b4.zip
op-kernel-dev-dc9691066fa7de51178de5ac3e06b3681557a7b4.tar.gz
pinctrl: sunxi: Move the reset handling functions out of the core
The way that reset is handled right now is that it is made optional for every pinctrl driver, while actually, it isn't used at all for the main pin controllers so far, and while it's mandatory for the A31's secondary pin controller. Move the reset functions out of the core and in the driver, where they can be made mandatory. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'drivers/pinctrl/sunxi')
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c23
-rw-r--r--drivers/pinctrl/sunxi/pinctrl-sunxi.c16
2 files changed, 23 insertions, 16 deletions
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
index b896f7b..8fcba48 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun6i-a31-r.c
@@ -17,6 +17,7 @@
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinctrl.h>
+#include <linux/reset.h>
#include "pinctrl-sunxi.h"
@@ -96,8 +97,26 @@ static const struct sunxi_pinctrl_desc sun6i_a31_r_pinctrl_data = {
static int sun6i_a31_r_pinctrl_probe(struct platform_device *pdev)
{
- return sunxi_pinctrl_init(pdev,
- &sun6i_a31_r_pinctrl_data);
+ struct reset_control *rstc;
+ int ret;
+
+ rstc = devm_reset_control_get(&pdev->dev, NULL);
+ if (IS_ERR(rstc)) {
+ dev_err(&pdev->dev, "Reset controller missing\n");
+ return PTR_ERR(rstc);
+ }
+
+ ret = reset_control_deassert(rstc);
+ if (ret)
+ return ret;
+
+ ret = sunxi_pinctrl_init(pdev,
+ &sun6i_a31_r_pinctrl_data);
+
+ if (ret)
+ reset_control_assert(rstc);
+
+ return ret;
}
static struct of_device_id sun6i_a31_r_pinctrl_match[] = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 2c3fb92..f6522b5 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -26,7 +26,6 @@
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
-#include <linux/reset.h>
#include <linux/slab.h>
#include "../core.h"
@@ -781,7 +780,6 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
struct device_node *node = pdev->dev.of_node;
struct pinctrl_pin_desc *pins;
struct sunxi_pinctrl *pctl;
- struct reset_control *rstc;
struct resource *res;
int i, ret, last_pin;
struct clk *clk;
@@ -875,17 +873,10 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
if (ret)
goto gpiochip_error;
- rstc = devm_reset_control_get_optional(&pdev->dev, NULL);
- if (!IS_ERR(rstc)) {
- ret = reset_control_deassert(rstc);
- if (ret)
- goto clk_error;
- }
-
pctl->irq = irq_of_parse_and_map(node, 0);
if (!pctl->irq) {
ret = -EINVAL;
- goto rstc_error;
+ goto clk_error;
}
pctl->domain = irq_domain_add_linear(node, SUNXI_IRQ_NUMBER,
@@ -893,7 +884,7 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
if (!pctl->domain) {
dev_err(&pdev->dev, "Couldn't register IRQ domain\n");
ret = -ENOMEM;
- goto rstc_error;
+ goto clk_error;
}
for (i = 0; i < SUNXI_IRQ_NUMBER; i++) {
@@ -911,9 +902,6 @@ int sunxi_pinctrl_init(struct platform_device *pdev,
return 0;
-rstc_error:
- if (!IS_ERR(rstc))
- reset_control_assert(rstc);
clk_error:
clk_disable_unprepare(clk);
gpiochip_error:
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