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author | Rong Wang <Rong.Wang@csr.com> | 2013-09-29 22:27:59 +0800 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2013-10-08 10:19:26 +0200 |
commit | 6a08a92ec45782e5543addf5f8785e2560a078f6 (patch) | |
tree | e5844fb3b5f3913e0a1f1c17790eebcf987a5540 /drivers/pinctrl/sirf/pinctrl-sirf.c | |
parent | af614b2301f0e30423240a754ec2812a4c793201 (diff) | |
download | op-kernel-dev-6a08a92ec45782e5543addf5f8785e2560a078f6.zip op-kernel-dev-6a08a92ec45782e5543addf5f8785e2560a078f6.tar.gz |
pinctrl: sirf: add USB1/UART1 pinmux usb/uart share
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1).
here we add this pinmux capability.
USB1/UART1 mode selection has dedicated control register in RSC module, here we attach
the register offset of private data of related pin groups.
Signed-off-by: Rong Wang <Rong.Wang@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/sirf/pinctrl-sirf.c')
-rw-r--r-- | drivers/pinctrl/sirf/pinctrl-sirf.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/pinctrl/sirf/pinctrl-sirf.c b/drivers/pinctrl/sirf/pinctrl-sirf.c index 26f946a..b81e388 100644 --- a/drivers/pinctrl/sirf/pinctrl-sirf.c +++ b/drivers/pinctrl/sirf/pinctrl-sirf.c @@ -166,12 +166,12 @@ static void sirfsoc_pinmux_endisable(struct sirfsoc_pmx *spmx, unsigned selector if (mux->funcmask && enable) { u32 func_en_val; + func_en_val = - readl(spmx->rsc_virtbase + SIRFSOC_RSC_PIN_MUX); + readl(spmx->rsc_virtbase + mux->ctrlreg); func_en_val = - (func_en_val & ~mux->funcmask) | (mux-> - funcval); - writel(func_en_val, spmx->rsc_virtbase + SIRFSOC_RSC_PIN_MUX); + (func_en_val & ~mux->funcmask) | (mux->funcval); + writel(func_en_val, spmx->rsc_virtbase + mux->ctrlreg); } } |