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| author | Georgi Djakov <gdjakov@mm-sol.com> | 2014-09-03 19:28:16 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2014-09-04 18:19:31 +0200 |
| commit | f712c554a7fca8f6308afbce844eacbf5e48787b (patch) | |
| tree | 967825a854c9eba91c242dd920e478dbf03594ff /drivers/pinctrl/qcom/pinctrl-msm.c | |
| parent | a9d490c5a8a05b1ff7d2d6fe5bf1053033788e76 (diff) | |
| download | op-kernel-dev-f712c554a7fca8f6308afbce844eacbf5e48787b.zip op-kernel-dev-f712c554a7fca8f6308afbce844eacbf5e48787b.tar.gz | |
pinctrl: qcom: Make the target processor value configurable
Currently the value used to specify that interrupts from the gpio should
be routed to the application processor is hardcoded for all Qualcomm SoCs.
But the new APQ8084 SoC uses a different value. To resolve this, we make
this value configurable for each SoC. For all existing SoCs we continue
to use the current value, and only for APQ8084 we use the new value.
Suggested-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Georgi Djakov <gdjakov@mm-sol.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/qcom/pinctrl-msm.c')
| -rw-r--r-- | drivers/pinctrl/qcom/pinctrl-msm.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c index 01eab47..d5ed127 100644 --- a/drivers/pinctrl/qcom/pinctrl-msm.c +++ b/drivers/pinctrl/qcom/pinctrl-msm.c @@ -653,8 +653,6 @@ static void msm_gpio_irq_ack(struct irq_data *d) spin_unlock_irqrestore(&pctrl->lock, flags); } -#define INTR_TARGET_PROC_APPS 4 - static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) { struct gpio_chip *gc = irq_data_get_irq_chip_data(d); @@ -678,7 +676,7 @@ static int msm_gpio_irq_set_type(struct irq_data *d, unsigned int type) /* Route interrupts to application cpu */ val = readl(pctrl->regs + g->intr_target_reg); val &= ~(7 << g->intr_target_bit); - val |= INTR_TARGET_PROC_APPS << g->intr_target_bit; + val |= g->intr_target_kpss_val << g->intr_target_bit; writel(val, pctrl->regs + g->intr_target_reg); /* Update configuration for gpio. |
