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| author | Stephen Warren <swarren@nvidia.com> | 2015-02-24 14:00:49 -0700 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-03-09 18:10:58 +0100 |
| commit | ea623061930ccf6d37b4a09a4e65a26fcf552c22 (patch) | |
| tree | 9f0b8b54e1eeb73aced4ae5ce25c4a53699a9fff /drivers/pinctrl/pinctrl-tegra.c | |
| parent | 8d4684b39b5865ef5471a256adfcd8d7c3e18d43 (diff) | |
| download | op-kernel-dev-ea623061930ccf6d37b4a09a4e65a26fcf552c22.zip op-kernel-dev-ea623061930ccf6d37b4a09a4e65a26fcf552c22.tar.gz | |
pinctrl: tegra: some bits move between registers
Some of the pinmux configuration bits that exist in "drive group"
registers in Tegra30..Tegra124 move to the "pinmux" registers on future
chips. Add a flag to support this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/pinctrl-tegra.c')
| -rw-r--r-- | drivers/pinctrl/pinctrl-tegra.c | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/drivers/pinctrl/pinctrl-tegra.c b/drivers/pinctrl/pinctrl-tegra.c index e5949d5..6cd651a 100644 --- a/drivers/pinctrl/pinctrl-tegra.c +++ b/drivers/pinctrl/pinctrl-tegra.c @@ -348,14 +348,24 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx, *width = 1; break; case TEGRA_PINCONF_PARAM_HIGH_SPEED_MODE: - *bank = g->drv_bank; - *reg = g->drv_reg; + if (pmx->soc->hsm_in_mux) { + *bank = g->mux_bank; + *reg = g->mux_reg; + } else { + *bank = g->drv_bank; + *reg = g->drv_reg; + } *bit = g->hsm_bit; *width = 1; break; case TEGRA_PINCONF_PARAM_SCHMITT: - *bank = g->drv_bank; - *reg = g->drv_reg; + if (pmx->soc->schmitt_in_mux) { + *bank = g->mux_bank; + *reg = g->mux_reg; + } else { + *bank = g->drv_bank; + *reg = g->drv_reg; + } *bit = g->schmitt_bit; *width = 1; break; @@ -390,8 +400,13 @@ static int tegra_pinconf_reg(struct tegra_pmx *pmx, *width = g->slwr_width; break; case TEGRA_PINCONF_PARAM_DRIVE_TYPE: - *bank = g->drv_bank; - *reg = g->drv_reg; + if (pmx->soc->drvtype_in_mux) { + *bank = g->mux_bank; + *reg = g->mux_reg; + } else { + *bank = g->drv_bank; + *reg = g->drv_reg; + } *bit = g->drvtype_bit; *width = 2; break; |
