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author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-02 09:28:03 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-05-02 09:28:03 -0700 |
commit | dfab34aa61a0f8c14a67d7b4c1dae28e57ba592d (patch) | |
tree | 581fd4d7394b838acb70c3c2e5d585b5b8a86b0d /drivers/pinctrl/pinctrl-imx.h | |
parent | a7726350e06401929eac0aa0677a5467106565fc (diff) | |
parent | 88cf9c5e494795a53ec360d0b38f483a6d4e508f (diff) | |
download | op-kernel-dev-dfab34aa61a0f8c14a67d7b4c1dae28e57ba592d.zip op-kernel-dev-dfab34aa61a0f8c14a67d7b4c1dae28e57ba592d.tar.gz |
Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device-tree updates from Olof Johansson:
"Part 1 of device-tree updates for 3.10. The bulk of the churn in this
branch is due to i.MX moving from C-defined pin control over to device
tree, which is a one-time conversion that will allow greater
flexibility down the road.
Besides that, there's PCI-e bindings for Marvell mvebu platforms and a
handful of cleanups to tegra due to the new include file functionality
of the device tree compiler"
* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (113 commits)
arm: mvebu: PCIe Device Tree informations for Armada XP GP
arm: mvebu: PCIe Device Tree informations for Armada 370 DB
arm: mvebu: PCIe Device Tree informations for Armada 370 Mirabox
arm: mvebu: PCIe Device Tree informations for Armada XP DB
arm: mvebu: PCIe Device Tree informations for OpenBlocks AX3-4
arm: mvebu: add PCIe Device Tree informations for Armada XP
arm: mvebu: add PCIe Device Tree informations for Armada 370
ARM: sunxi: unify osc24M_fixed and osc24M
arm: vt8500: Add SDHC support to WM8505 DT
ARM: dts: Add a 64 bits version of the skeleton device tree
ARM: mvebu: Add Device Bus and CFI flash memory support to defconfig
ARM: mvebu: Add support for NOR flash device on Openblocks AX3 board
ARM: mvebu: Add support for NOR flash device on Armada XP-GP board
ARM: mvebu: Add Device Bus support for Armada 370/XP SoC
ARM: dts: imx6dl-wandboard: Add USB Host support
ARM: dts: imx51 cpu node
ARM: dts: Add missing imx27-phytec-phycore dtb target
ARM: dts: Add NFC support for i.MX27 Phytec PCM038 module
ARM: i.MX51: Add PATA support
ARM: dts: Add initial support for Wandboard Dual-Lite
...
Diffstat (limited to 'drivers/pinctrl/pinctrl-imx.h')
-rw-r--r-- | drivers/pinctrl/pinctrl-imx.h | 29 |
1 files changed, 7 insertions, 22 deletions
diff --git a/drivers/pinctrl/pinctrl-imx.h b/drivers/pinctrl/pinctrl-imx.h index 9b65e78..607ef54 100644 --- a/drivers/pinctrl/pinctrl-imx.h +++ b/drivers/pinctrl/pinctrl-imx.h @@ -26,6 +26,10 @@ struct platform_device; * elements in .pins so we can iterate over that array * @mux_mode: the mux mode for each pin in this group. The size of this * array is the same as pins. + * @input_reg: select input register offset for this mux if any + * 0 if no select input setting needed. + * @input_val: the select input value for each pin in this group. The size of + * this array is the same as pins. * @configs: the config for each pin in this group. The size of this * array is the same as pins. */ @@ -34,6 +38,8 @@ struct imx_pin_group { unsigned int *pins; unsigned npins; unsigned int *mux_mode; + u16 *input_reg; + unsigned int *input_val; unsigned long *configs; }; @@ -51,30 +57,19 @@ struct imx_pmx_func { /** * struct imx_pin_reg - describe a pin reg map - * The last 3 members are used for select input setting - * @pid: pin id * @mux_reg: mux register offset * @conf_reg: config register offset - * @mux_mode: mux mode - * @input_reg: select input register offset for this mux if any - * 0 if no select input setting needed. - * @input_val: the value set to select input register */ struct imx_pin_reg { - u16 pid; u16 mux_reg; u16 conf_reg; - u8 mux_mode; - u16 input_reg; - u8 input_val; }; struct imx_pinctrl_soc_info { struct device *dev; const struct pinctrl_pin_desc *pins; unsigned int npins; - const struct imx_pin_reg *pin_regs; - unsigned int npin_regs; + struct imx_pin_reg *pin_regs; struct imx_pin_group *groups; unsigned int ngroups; struct imx_pmx_func *functions; @@ -84,16 +79,6 @@ struct imx_pinctrl_soc_info { #define NO_MUX 0x0 #define NO_PAD 0x0 -#define IMX_PIN_REG(id, conf, mux, mode, input, val) \ - { \ - .pid = id, \ - .conf_reg = conf, \ - .mux_reg = mux, \ - .mux_mode = mode, \ - .input_reg = input, \ - .input_val = val, \ - } - #define IMX_PINCTRL_PIN(pin) PINCTRL_PIN(pin, #pin) #define PAD_CTL_MASK(len) ((1 << len) - 1) |