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authorMika Westerberg <mika.westerberg@linux.intel.com>2014-07-25 09:54:47 +0300
committerLinus Walleij <linus.walleij@linaro.org>2014-07-28 12:21:00 +0200
commite1ee5c578fb1fa24b7ccaf1a11237a2bd70b6f9a (patch)
tree26c058afba930d2333a2dc7711d66622ca550ad6 /drivers/pinctrl/Kconfig
parent343f132752bede1dc3a740ba469b665ffb111500 (diff)
downloadop-kernel-dev-e1ee5c578fb1fa24b7ccaf1a11237a2bd70b6f9a.zip
op-kernel-dev-e1ee5c578fb1fa24b7ccaf1a11237a2bd70b6f9a.tar.gz
pinctrl: baytrail: Convert to use gpiolib irqchip
Instead of open-coding irqchip handling in the driver we can take advantage of the new irqchip helpers provided by the gpiolib core. While doing this we also make sure that we call gpiochip_irqchip_add() after the gpiochip itself is registered as required. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/Kconfig')
-rw-r--r--drivers/pinctrl/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig
index 3d94e47..4e3231a 100644
--- a/drivers/pinctrl/Kconfig
+++ b/drivers/pinctrl/Kconfig
@@ -70,7 +70,7 @@ config PINCTRL_AT91
config PINCTRL_BAYTRAIL
bool "Intel Baytrail GPIO pin control"
depends on GPIOLIB && ACPI && X86
- select IRQ_DOMAIN
+ select GPIOLIB_IRQCHIP
help
driver for memory mapped GPIO functionality on Intel Baytrail
platforms. Supports 3 banks with 102, 28 and 44 gpios.
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