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authorIcenowy Zheng <icenowy@aosc.xyz>2017-03-25 22:50:09 +0800
committerKishon Vijay Abraham I <kishon@ti.com>2017-04-10 16:42:57 +0530
commitd699c1d0860aa8b3031d56ec861e6c2f2e37df95 (patch)
treea95a2630b1256a7bf6fa4f150978b035892e2165 /drivers/phy
parenta0b1910e857897ae6c420fa0ece52c87d7cff373 (diff)
downloadop-kernel-dev-d699c1d0860aa8b3031d56ec861e6c2f2e37df95.zip
op-kernel-dev-d699c1d0860aa8b3031d56ec861e6c2f2e37df95.tar.gz
phy: sun4i-usb: change PHYCTL register clearing code
It seems that all SoCs with the PHYCTL register offset as 0x10 need the PHYCTL register to be cleared before it's written. Change PHYCTL register clearing code to judge whether clearing is needed based on the PHYCTL offset. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy')
-rw-r--r--drivers/phy/phy-sun4i-usb.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/drivers/phy/phy-sun4i-usb.c b/drivers/phy/phy-sun4i-usb.c
index a21b5f2..62b4d25 100644
--- a/drivers/phy/phy-sun4i-usb.c
+++ b/drivers/phy/phy-sun4i-usb.c
@@ -188,10 +188,8 @@ static void sun4i_usb_phy_write(struct sun4i_usb_phy *phy, u32 addr, u32 data,
spin_lock_irqsave(&phy_data->reg_lock, flags);
- if (phy_data->cfg->type == sun8i_a33_phy ||
- phy_data->cfg->type == sun50i_a64_phy ||
- phy_data->cfg->type == sun8i_v3s_phy) {
- /* A33 or A64 needs us to set phyctl to 0 explicitly */
+ if (phy_data->cfg->phyctl_offset == REG_PHYCTL_A33) {
+ /* SoCs newer than A33 need us to set phyctl to 0 explicitly */
writel(0, phyctl);
}
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