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authorKishon Vijay Abraham I <kishon@ti.com>2016-06-28 12:02:08 +0530
committerKishon Vijay Abraham I <kishon@ti.com>2016-07-04 17:19:21 +0530
commit65048f4dd9fae7335b48ab23a879119c0e7fa105 (patch)
treed76b571da2affcccbded5d8e42aa6f3955225b07 /drivers/phy/phy-xgene.c
parent1a695a905c18548062509178b98bc91e67510864 (diff)
downloadop-kernel-dev-65048f4dd9fae7335b48ab23a879119c0e7fa105.zip
op-kernel-dev-65048f4dd9fae7335b48ab23a879119c0e7fa105.tar.gz
phy: xgene: rename "enum phy_mode" to "enum xgene_phy_mode"
No functional change. Rename "enum phy_mode" to "enum xgene_phy_mode" in xgene phy driver in preparation for adding set_mode callback in phy core. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Loc Ho <lho@apm.com>
Diffstat (limited to 'drivers/phy/phy-xgene.c')
-rw-r--r--drivers/phy/phy-xgene.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/phy/phy-xgene.c b/drivers/phy/phy-xgene.c
index 385362e..ae266e0 100644
--- a/drivers/phy/phy-xgene.c
+++ b/drivers/phy/phy-xgene.c
@@ -518,7 +518,7 @@ enum clk_type_t {
CLK_INT_SING = 2, /* Internal single ended */
};
-enum phy_mode {
+enum xgene_phy_mode {
MODE_SATA = 0, /* List them for simple reference */
MODE_SGMII = 1,
MODE_PCIE = 2,
@@ -542,7 +542,7 @@ struct xgene_sata_override_param {
struct xgene_phy_ctx {
struct device *dev;
struct phy *phy;
- enum phy_mode mode; /* Mode of operation */
+ enum xgene_phy_mode mode; /* Mode of operation */
enum clk_type_t clk_type; /* Input clock selection */
void __iomem *sds_base; /* PHY CSR base addr */
struct clk *clk; /* Optional clock */
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