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authorRoger Quadros <rogerq@ti.com>2014-03-06 16:38:44 +0200
committerKishon Vijay Abraham I <kishon@ti.com>2014-03-09 12:45:11 +0530
commit56042e4e975ce7b0817ebc024d02fa96ee01e107 (patch)
treee161f81c77811cc4ee757e7d042a6d2374920d94 /drivers/phy/phy-ti-pipe3.c
parent629138dbaec33cecbb61fda1f5c1f047a1374993 (diff)
downloadop-kernel-dev-56042e4e975ce7b0817ebc024d02fa96ee01e107.zip
op-kernel-dev-56042e4e975ce7b0817ebc024d02fa96ee01e107.tar.gz
phy: ti-pipe3: Fix suspend/resume and module reload
Due to Errata i783, SATA breaks if its DPLL is idled. The recommeded workaround to issue a softreset to the SATA controller doesn't seem to work. Here we just prevent SATA DPLL from Idling and hence avoid the issue altogether. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Diffstat (limited to 'drivers/phy/phy-ti-pipe3.c')
-rw-r--r--drivers/phy/phy-ti-pipe3.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 12cc900..5913676 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -238,6 +238,10 @@ static int ti_pipe3_exit(struct phy *x)
u32 val;
unsigned long timeout;
+ /* SATA DPLL can't be powered down due to Errata i783 */
+ if (of_device_is_compatible(phy->dev->of_node, "ti,phy-pipe3-sata"))
+ return 0;
+
/* Put DPLL in IDLE mode */
val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
val |= PLL_IDLE;
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