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authorAlex Chiang <achiang@hp.com>2009-03-05 19:28:40 -0700
committerMatthew Wilcox <willy@linux.intel.com>2009-03-12 15:09:51 -0400
commitcb4cb4ac7338c28b047760be187355ed9c783e72 (patch)
treef6cacbf06c400498c05bb4072f61e045aac0204e /drivers/pci
parent649426efcfbc67a8b033497151816cbac9fd0cfa (diff)
downloadop-kernel-dev-cb4cb4ac7338c28b047760be187355ed9c783e72.zip
op-kernel-dev-cb4cb4ac7338c28b047760be187355ed9c783e72.tar.gz
PCIe: AER: during disable, check subordinate before walking
Commit 47a8b0cc (Enable PCIe AER only after checking firmware support) wants to walk the PCI bus in the remove path to disable AER, and calls pci_walk_bus for downstream bridges. Unfortunately, in the remove path, we remove devices and bridges in a depth-first manner, starting with the furthest downstream bridge and working our way backwards. The furthest downstream bridges will not have a dev->subordinate, and we hit a NULL deref in pci_walk_bus. Check for dev->subordinate first before attempting to walk the PCI hierarchy below us. Acked-by: Andrew Patterson <andrew.patterson@hp.com> Signed-off-by: Alex Chiang <achiang@hp.com> Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/pcie/aer/aerdrv_core.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index d0c9736..3825750 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -133,6 +133,9 @@ static void set_downstream_devices_error_reporting(struct pci_dev *dev,
bool enable)
{
set_device_error_reporting(dev, &enable);
+
+ if (!dev->subordinate)
+ return;
pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable);
}
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