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authorBjorn Helgaas <bhelgaas@google.com>2017-02-08 15:37:47 -0600
committerBjorn Helgaas <bhelgaas@google.com>2017-02-08 15:37:47 -0600
commitec6bd78a09d9967c4fcec53e7fabfaabd4f0e367 (patch)
treed111bebca6682aa4f608f40f28ddf1ad8077d8cf /drivers/pci
parent7ce7d89f48834cefece7804d38fc5d85382edf77 (diff)
downloadop-kernel-dev-ec6bd78a09d9967c4fcec53e7fabfaabd4f0e367.zip
op-kernel-dev-ec6bd78a09d9967c4fcec53e7fabfaabd4f0e367.tar.gz
PCI: xilinx: Configure PCIe MPS settings
Make sure PCIe MPS settings are valid when we enumerate a new hierarchy. Based-on-patch-by: Jon Mason <jon.mason@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci')
-rw-r--r--drivers/pci/host/pcie-xilinx.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/pci/host/pcie-xilinx.c b/drivers/pci/host/pcie-xilinx.c
index c8616fa..7f030f5 100644
--- a/drivers/pci/host/pcie-xilinx.c
+++ b/drivers/pci/host/pcie-xilinx.c
@@ -632,7 +632,7 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
struct xilinx_pcie_port *port;
- struct pci_bus *bus;
+ struct pci_bus *bus, *child;
int err;
resource_size_t iobase = 0;
LIST_HEAD(res);
@@ -686,6 +686,8 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
#ifndef CONFIG_MICROBLAZE
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
#endif
+ list_for_each_entry(child, &bus->children, node)
+ pcie_bus_configure_settings(child);
pci_bus_add_devices(bus);
return 0;
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