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author | Rajat Jain <rajatja@google.com> | 2017-01-02 22:34:10 -0800 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-02-10 17:14:52 -0600 |
commit | 0fc1223f0e77a748f7040562faaa7027f7db71ca (patch) | |
tree | 2265dce7f56f188bf4ab7f4db698dcd1d98c43a6 /drivers/pci/pcie | |
parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) | |
download | op-kernel-dev-0fc1223f0e77a748f7040562faaa7027f7db71ca.zip op-kernel-dev-0fc1223f0e77a748f7040562faaa7027f7db71ca.tar.gz |
PCI/ASPM: Add L1 substate capability structure register definitions
Add L1 substate capability structure register definitions for use in
subsequent patches. See the PCIe r3.1 spec, sec 7.33.
[bhelgaas: add PCIe spec reference]
Signed-off-by: Rajat Jain <rajatja@google.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Diffstat (limited to 'drivers/pci/pcie')
0 files changed, 0 insertions, 0 deletions