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author | Patrick McHardy <kaber@trash.net> | 2010-02-10 14:17:10 +0100 |
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committer | Patrick McHardy <kaber@trash.net> | 2010-02-10 14:17:10 +0100 |
commit | 9ab99d5a43e9f283738fd9fd365539306d13eaac (patch) | |
tree | 0214a63e3f4f7f4f187f0139e4a5d8abe453902b /drivers/pci/pcie/aspm.c | |
parent | 76780373190d7e8ddfb6fed06aef068e2445c743 (diff) | |
parent | b1109bf085c8dd69537b7876ea83f914dd1fe46a (diff) | |
download | op-kernel-dev-9ab99d5a43e9f283738fd9fd365539306d13eaac.zip op-kernel-dev-9ab99d5a43e9f283738fd9fd365539306d13eaac.tar.gz |
Merge branch 'master' of /repos/git/net-next-2.6
Signed-off-by: Patrick McHardy <kaber@trash.net>
Diffstat (limited to 'drivers/pci/pcie/aspm.c')
-rw-r--r-- | drivers/pci/pcie/aspm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 5a01fc7..be53d98 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -1,6 +1,6 @@ /* * File: drivers/pci/pcie/aspm.c - * Enabling PCIE link L0s/L1 state and Clock Power Management + * Enabling PCIe link L0s/L1 state and Clock Power Management * * Copyright (C) 2007 Intel * Copyright (C) Zhang Yanmin (yanmin.zhang@intel.com) @@ -499,7 +499,7 @@ static int pcie_aspm_sanity_check(struct pci_dev *pdev) int pos; u32 reg32; /* - * Some functions in a slot might not all be PCIE functions, + * Some functions in a slot might not all be PCIe functions, * very strange. Disable ASPM for the whole slot */ list_for_each_entry(child, &pdev->subordinate->devices, bus_list) { |