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| author | Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com> | 2010-04-15 13:09:13 +0900 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-05-11 12:01:12 -0700 |
| commit | c6d34eddecb34fd84f9fb2ea26a63cfde5662f49 (patch) | |
| tree | a80ed52485693d649158621edcd8bd2d9431d3c9 /drivers/pci/pcie/aer/aerdrv.c | |
| parent | d4dfd7278eade24c4aa4b36b8df981fab04f2f26 (diff) | |
| download | op-kernel-dev-c6d34eddecb34fd84f9fb2ea26a63cfde5662f49.zip op-kernel-dev-c6d34eddecb34fd84f9fb2ea26a63cfde5662f49.tar.gz | |
PCI: aerdrv: RsvdP of PCI_ERR_ROOT_COMMAND
Handle preserved bits properly.
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pcie/aer/aerdrv.c')
| -rw-r--r-- | drivers/pci/pcie/aer/aerdrv.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c index 7a711ee..4e845ab 100644 --- a/drivers/pci/pcie/aer/aerdrv.c +++ b/drivers/pci/pcie/aer/aerdrv.c @@ -234,13 +234,15 @@ static int __devinit aer_probe(struct pcie_device *dev) static pci_ers_result_t aer_root_reset(struct pci_dev *dev) { u16 p2p_ctrl; - u32 status; + u32 reg32; int pos; pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); /* Disable Root's interrupt in response to error messages */ - pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, 0); + pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, ®32); + reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK; + pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); /* Assert Secondary Bus Reset */ pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl); @@ -265,12 +267,14 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) msleep(200); dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n"); + /* Clear Root Error Status */ + pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, ®32); + pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, reg32); + /* Enable Root Port's interrupt in response to error messages */ - pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &status); - pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, status); - pci_write_config_dword(dev, - pos + PCI_ERR_ROOT_COMMAND, - ROOT_PORT_INTR_ON_MESG_MASK); + pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, ®32); + reg32 |= ROOT_PORT_INTR_ON_MESG_MASK; + pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32); return PCI_ERS_RESULT_RECOVERED; } |
