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authorKeith Busch <keith.busch@intel.com>2016-04-28 16:24:48 -0600
committerBjorn Helgaas <bhelgaas@google.com>2016-05-03 10:39:24 -0500
commit26e515713342b6f7c553aa3c66b21c6ab7cf82af (patch)
treeb1a1f3223de5c7ea6d6a379f06f5d8d687ae7490 /drivers/pci/pcie/Makefile
parent10126ac14d36e74b2705802dc915b0b18463a51f (diff)
downloadop-kernel-dev-26e515713342b6f7c553aa3c66b21c6ab7cf82af.zip
op-kernel-dev-26e515713342b6f7c553aa3c66b21c6ab7cf82af.tar.gz
PCI: Add Downstream Port Containment driver
Add driver for the PCI Express Downstream Port Containment extended capability. DPC is an optional capability to contain uncorrectable errors below a port. For more information on DPC, please see PCI Express Base Specification Revision 4, section 7.31, or view the PCI-SIG DPC ECN here: https://pcisig.com/sites/default/files/specification_documents/ECN_DPC_2012-02-09_finalized.pdf When a DPC event is triggered, the hardware disables downstream links, so the DPC driver schedules removal for all devices below this port. This may happen concurrently with a PCIe hotplug driver if enabled. When all downstream devices are removed and the link state transitions to disabled, the DPC driver clears the DPC status and interrupt bits so the link may retrain for a newly connected device. [bhelgaas: clear (not set) DPC_CTL bits on remove, whitespace cleanup] Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Lukas Wunner <lukas@wunner.de>
Diffstat (limited to 'drivers/pci/pcie/Makefile')
-rw-r--r--drivers/pci/pcie/Makefile2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/pci/pcie/Makefile b/drivers/pci/pcie/Makefile
index 00c62df..b24525b 100644
--- a/drivers/pci/pcie/Makefile
+++ b/drivers/pci/pcie/Makefile
@@ -14,3 +14,5 @@ obj-$(CONFIG_PCIEPORTBUS) += pcieportdrv.o
obj-$(CONFIG_PCIEAER) += aer/
obj-$(CONFIG_PCIE_PME) += pme.o
+
+obj-$(CONFIG_PCIE_DPC) += pcie-dpc.o
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