diff options
author | Takashi Iwai <tiwai@suse.de> | 2010-02-17 14:24:46 +0100 |
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committer | Takashi Iwai <tiwai@suse.de> | 2010-02-17 14:24:46 +0100 |
commit | 7fb3a069bc5d3577409c2ae89f89cd264ff85816 (patch) | |
tree | 7fe3ba3b95faeecb01e4feafb9288ef4b523c6b3 /drivers/pci/pci.c | |
parent | 291186e049d7f8178ad31d43c38a53889f25d79e (diff) | |
parent | 9d3415a8cc76ff65c6602a121ac318432c5cd7ba (diff) | |
download | op-kernel-dev-7fb3a069bc5d3577409c2ae89f89cd264ff85816.zip op-kernel-dev-7fb3a069bc5d3577409c2ae89f89cd264ff85816.tar.gz |
Merge branch 'fix/misc' into topic/misc
Conflicts:
sound/pci/hda/patch_realtek.c
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r-- | drivers/pci/pci.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 0906599..315fea4 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -29,7 +29,17 @@ const char *pci_power_names[] = { }; EXPORT_SYMBOL_GPL(pci_power_names); -unsigned int pci_pm_d3_delay = PCI_PM_D3_WAIT; +unsigned int pci_pm_d3_delay; + +static void pci_dev_d3_sleep(struct pci_dev *dev) +{ + unsigned int delay = dev->d3_delay; + + if (delay < pci_pm_d3_delay) + delay = pci_pm_d3_delay; + + msleep(delay); +} #ifdef CONFIG_PCI_DOMAINS int pci_domains_supported = 1; @@ -522,7 +532,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state) /* Mandatory power management transition delays */ /* see PCI PM 1.1 5.6.1 table 18 */ if (state == PCI_D3hot || dev->current_state == PCI_D3hot) - msleep(pci_pm_d3_delay); + pci_dev_d3_sleep(dev); else if (state == PCI_D2 || dev->current_state == PCI_D2) udelay(PCI_PM_D2_DELAY); @@ -1409,6 +1419,7 @@ void pci_pm_init(struct pci_dev *dev) } dev->pm_cap = pm; + dev->d3_delay = PCI_PM_D3_WAIT; dev->d1_support = false; dev->d2_support = false; @@ -2247,12 +2258,12 @@ static int pci_pm_reset(struct pci_dev *dev, int probe) csr &= ~PCI_PM_CTRL_STATE_MASK; csr |= PCI_D3hot; pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); - msleep(pci_pm_d3_delay); + pci_dev_d3_sleep(dev); csr &= ~PCI_PM_CTRL_STATE_MASK; csr |= PCI_D0; pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr); - msleep(pci_pm_d3_delay); + pci_dev_d3_sleep(dev); return 0; } |