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authorShmulik Ravid <shmulikr@broadcom.com>2009-12-03 22:27:51 +0200
committerJesse Barnes <jbarnes@virtuousgeek.org>2009-12-04 15:49:44 -0800
commit04b55c4732780381410e52db0e9bfb7661f2b4b3 (patch)
tree6c8a96438f40aa60038a9bd422c38833bdc7aa7a /drivers/pci/pci.c
parentbb965401fd2afa26629b244e7bb2e48a117dc238 (diff)
downloadop-kernel-dev-04b55c4732780381410e52db0e9bfb7661f2b4b3.zip
op-kernel-dev-04b55c4732780381410e52db0e9bfb7661f2b4b3.tar.gz
PCI: read-modify-write the pcie device control register when initiating pcie flr
The pcie_flr routine writes the device control register with the FLR bit set clearing all other fields for the FLR duration. Among other fields, the Max_Payload_Size is also cleared which can cause errors if there are transactions lurking in the HW pipeline. The patch replaces the blank write with read-modify-write of the control register keeping the other fields intact. Signed-off-by: Shmulik Ravid <shmulikr@broadcom.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'drivers/pci/pci.c')
-rw-r--r--drivers/pci/pci.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index be91a09..6af212c 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -2140,7 +2140,7 @@ static int pcie_flr(struct pci_dev *dev, int probe)
int i;
int pos;
u32 cap;
- u16 status;
+ u16 status, control;
pos = pci_pcie_cap(dev);
if (!pos)
@@ -2167,8 +2167,10 @@ static int pcie_flr(struct pci_dev *dev, int probe)
"proceeding with reset anyway\n");
clear:
- pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
- PCI_EXP_DEVCTL_BCR_FLR);
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control);
+ control |= PCI_EXP_DEVCTL_BCR_FLR;
+ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
+
msleep(100);
return 0;
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