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| author | Bjorn Helgaas <bhelgaas@google.com> | 2013-04-24 11:37:49 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2013-04-24 11:37:49 -0600 |
| commit | d4f09c5d7fbabd1389a5f03f5c9329d790f544e3 (patch) | |
| tree | e7c5a84a9b20364fd21ae7f5ce6c4412440c0937 /drivers/pci/msi.h | |
| parent | 42c34707f9d24ef159cce87e4353babcf2b417a6 (diff) | |
| parent | a9047f24df85b06d3fd443ff76e9993bc127c570 (diff) | |
| download | op-kernel-dev-d4f09c5d7fbabd1389a5f03f5c9329d790f544e3.zip op-kernel-dev-d4f09c5d7fbabd1389a5f03f5c9329d790f544e3.tar.gz | |
Merge branch 'pci/gavin-msi-cleanup' into next
* pci/gavin-msi-cleanup:
vfio-pci: Use cached MSI/MSI-X capabilities
vfio-pci: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK
PCI: Remove "extern" from function declarations
PCI: Use PCI_MSIX_TABLE_BIR, not PCI_MSIX_FLAGS_BIRMASK
PCI: Drop msi_mask_reg() and remove drivers/pci/msi.h
PCI: Use msix_table_size() directly, drop multi_msix_capable()
PCI: Drop msix_table_offset_reg() and msix_pba_offset_reg() macros
PCI: Drop is_64bit_address() and is_mask_bit_support() macros
PCI: Drop msi_data_reg() macro
PCI: Drop msi_lower_address_reg() and msi_upper_address_reg() macros
PCI: Drop msi_control_reg() macro and use PCI_MSI_FLAGS directly
PCI: Use cached MSI/MSI-X offsets from dev, not from msi_desc
PCI: Clean up MSI/MSI-X capability #defines
PCI: Use cached MSI-X cap while enabling MSI-X
PCI: Use cached MSI cap while enabling MSI interrupts
PCI: Remove MSI/MSI-X cap check in pci_msi_check_device()
PCI: Cache MSI/MSI-X capability offsets in struct pci_dev
PCI: Use u8, not int, for PM capability offset
[SCSI] megaraid_sas: Use correct #define for MSI-X capability
Diffstat (limited to 'drivers/pci/msi.h')
| -rw-r--r-- | drivers/pci/msi.h | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h deleted file mode 100644 index 65c42f8..0000000 --- a/drivers/pci/msi.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (C) 2003-2004 Intel - * Copyright (C) Tom Long Nguyen (tom.l.nguyen@intel.com) - */ - -#ifndef MSI_H -#define MSI_H - -#define msi_control_reg(base) (base + PCI_MSI_FLAGS) -#define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) -#define msi_upper_address_reg(base) (base + PCI_MSI_ADDRESS_HI) -#define msi_data_reg(base, is64bit) \ - (base + ((is64bit == 1) ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32)) -#define msi_mask_reg(base, is64bit) \ - (base + ((is64bit == 1) ? PCI_MSI_MASK_64 : PCI_MSI_MASK_32)) -#define is_64bit_address(control) (!!(control & PCI_MSI_FLAGS_64BIT)) -#define is_mask_bit_support(control) (!!(control & PCI_MSI_FLAGS_MASKBIT)) - -#define msix_table_offset_reg(base) (base + PCI_MSIX_TABLE) -#define msix_pba_offset_reg(base) (base + PCI_MSIX_PBA) -#define msix_table_size(control) ((control & PCI_MSIX_FLAGS_QSIZE)+1) -#define multi_msix_capable(control) msix_table_size((control)) - -#endif /* MSI_H */ |
