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authorEric W. Biederman <ebiederm@xmission.com>2006-10-04 02:16:41 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 07:55:28 -0700
commit1ce03373a7f4b5fa8ca5be02ff35229800a6e12b (patch)
tree918fd844d371ec0fd9d19ac16a7798e361cb5583 /drivers/pci/msi.h
parentc4fa0bbf384496ae4acc0a150719d9d8fa8d11b3 (diff)
downloadop-kernel-dev-1ce03373a7f4b5fa8ca5be02ff35229800a6e12b.zip
op-kernel-dev-1ce03373a7f4b5fa8ca5be02ff35229800a6e12b.tar.gz
[PATCH] genirq: msi: make the msi code irq based and not vector based
The msi currently allocates irqs backwards. First it allocates a platform dependent routing value for an interrupt the ``vector'' and then it figures out from the vector which irq you are on. For ia64 this is fine. For x86 and x86_64 this is complete nonsense and makes an enourmous mess of the irq handling code and prevents some pretty significant cleanups in the code for handling large numbers of irqs. This patch refactors msi.c to work in terms of irqs and create_irq/destroy_irq for dynamically managing irqs. Hopefully this is finally a version of msi.c that is useful on more than just x86 derivatives. Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Rajesh Shah <rajesh.shah@intel.com> Cc: Andi Kleen <ak@muc.de> Cc: "Protasevich, Natalie" <Natalie.Protasevich@UNISYS.com> Cc: "Luck, Tony" <tony.luck@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/pci/msi.h')
-rw-r--r--drivers/pci/msi.h7
1 files changed, 2 insertions, 5 deletions
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index 6793241..435d05a 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -8,9 +8,6 @@
#include <asm/msi.h>
-extern int vector_irq[NR_VECTORS];
-extern void (*interrupt[NR_IRQS])(void);
-
/*
* MSI-X Address Register
*/
@@ -58,9 +55,9 @@ struct msi_desc {
__u8 maskbit : 1; /* mask-pending bit supported ? */
__u8 state : 1; /* {0: free, 1: busy} */
__u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
- __u8 entry_nr; /* specific enabled entry */
- __u8 default_vector; /* default pre-assigned vector */
__u8 pos; /* Location of the msi capability */
+ __u16 entry_nr; /* specific enabled entry */
+ unsigned default_irq; /* default pre-assigned irq */
}msi_attrib;
struct {
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