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authorShawn Lin <shawn.lin@rock-chips.com>2017-03-20 17:39:40 +0800
committerBjorn Helgaas <bhelgaas@google.com>2017-04-03 16:04:48 -0500
commit55021718b9e9d21efd47117dd0e6c1cfebd654f8 (patch)
treee987730711f1638269de02fd4006742e1ca3e218 /drivers/pci/host/pcie-rockchip.c
parentdeb518f6ae4d5da22fb1e8d6c6a690253ffa700d (diff)
downloadop-kernel-dev-55021718b9e9d21efd47117dd0e6c1cfebd654f8.zip
op-kernel-dev-55021718b9e9d21efd47117dd0e6c1cfebd654f8.tar.gz
PCI: rockchip: Advertise 128-byte Read Completion Boundary support
Rockchip Root Ports support either 64 or 128 byte Read Completion Boundary (RCB). Set the RCB bit in the Link Control register to indicate this. A 128 byte RCB significantly improves performance of NVMe with libaio. [bhelgaas: changelog] Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Brian Norris <briannorris@chromium.org> Cc: Jeffy Chen <jeffy.chen@rock-chips.com>
Diffstat (limited to 'drivers/pci/host/pcie-rockchip.c')
-rw-r--r--drivers/pci/host/pcie-rockchip.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index b4dfe3b..a746721 100644
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -601,6 +601,11 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
status |= PCI_EXP_LNKCTL_CCC;
rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_LCS);
+ /* Set RC's RCB to 128 */
+ status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_LCS);
+ status |= PCI_EXP_LNKCTL_RCB;
+ rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_LCS);
+
/* Enable Gen1 training */
rockchip_pcie_write(rockchip, PCIE_CLIENT_LINK_TRAIN_ENABLE,
PCIE_CLIENT_CONFIG);
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