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| author | Joao Pinto <Joao.Pinto@synopsys.com> | 2016-03-10 14:44:35 -0600 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2016-03-15 08:50:45 -0500 |
| commit | 886bc5ceb5cc3ad4b219502d72b277e3c3255a32 (patch) | |
| tree | 2648e30863433834dd7df7411f677f1a8c7888f1 /drivers/pci/host/pci-imx6.c | |
| parent | c1678ffcdea25afe4fbbebfab13d65a7db5458fb (diff) | |
| download | op-kernel-dev-886bc5ceb5cc3ad4b219502d72b277e3c3255a32.zip op-kernel-dev-886bc5ceb5cc3ad4b219502d72b277e3c3255a32.tar.gz | |
PCI: designware: Add generic dw_pcie_wait_for_link()
Several DesignWare-based drivers (dra7xx, exynos, imx6, keystone, qcom, and
spear13xx) had similar loops waiting for the link to come up.
Add a generic dw_pcie_wait_for_link() for use by all these drivers so the
waiting is done consistently, e.g., always using usleep_range() rather than
mdelay() and using similar timeouts and retry counts.
Note that this changes the Keystone link training/wait for link strategy,
so we initiate link training, then wait longer for the link to come up
before re-initiating link training.
[bhelgaas: changelog, split into its own patch, update pci-keystone.c, pcie-qcom.c]
Signed-off-by: Joao Pinto <jpinto@synopsys.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Pratyush Anand <pratyush.anand@gmail.com>
Diffstat (limited to 'drivers/pci/host/pci-imx6.c')
| -rw-r--r-- | drivers/pci/host/pci-imx6.c | 13 |
1 files changed, 4 insertions, 9 deletions
diff --git a/drivers/pci/host/pci-imx6.c b/drivers/pci/host/pci-imx6.c index fe60096..6c35d86 100644 --- a/drivers/pci/host/pci-imx6.c +++ b/drivers/pci/host/pci-imx6.c @@ -330,19 +330,14 @@ static void imx6_pcie_init_phy(struct pcie_port *pp) static int imx6_pcie_wait_for_link(struct pcie_port *pp) { - unsigned int retries; - - for (retries = 0; retries < 200; retries++) { - if (dw_pcie_link_up(pp)) - return 0; - usleep_range(100, 1000); - } + /* check if the link is up or not */ + if (!dw_pcie_wait_for_link(pp)) + return 0; - dev_err(pp->dev, "phy link never came up\n"); dev_dbg(pp->dev, "DEBUG_R0: 0x%08x, DEBUG_R1: 0x%08x\n", readl(pp->dbi_base + PCIE_PHY_DEBUG_R0), readl(pp->dbi_base + PCIE_PHY_DEBUG_R1)); - return -EINVAL; + return -ETIMEDOUT; } static int imx6_pcie_wait_for_speed_change(struct pcie_port *pp) |
