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author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2017-08-28 18:52:58 +0800 |
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committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-08-29 16:17:03 -0500 |
commit | 4a2745d760facac895c107bed41e167e3806fced (patch) | |
tree | ff5a179b4710ee9e0e576e611f5fb1aa21e3a633 /drivers/pci/dwc | |
parent | fa92dba92c0026a8378085dbeab8a1d8ad8476c6 (diff) | |
download | op-kernel-dev-4a2745d760facac895c107bed41e167e3806fced.zip op-kernel-dev-4a2745d760facac895c107bed41e167e3806fced.tar.gz |
PCI: layerscape: Disable outbound windows configured by bootloader
Disable all the outbound windows to avoid one transaction hitting multiple
outbound windows. dw_pcie_setup_rc() will reconfigure the outbound
windows, which may conflict with windows configured by the bootloader.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Roy Zang <tie-fei.zang@freescale.com>
Diffstat (limited to 'drivers/pci/dwc')
-rw-r--r-- | drivers/pci/dwc/pci-layerscape.c | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/drivers/pci/dwc/pci-layerscape.c b/drivers/pci/dwc/pci-layerscape.c index 27234da..a77f756 100644 --- a/drivers/pci/dwc/pci-layerscape.c +++ b/drivers/pci/dwc/pci-layerscape.c @@ -35,6 +35,8 @@ #define PCIE_STRFMR1 0x71c /* Symbol Timer & Filter Mask Register1 */ #define PCIE_DBI_RO_WR_EN 0x8bc /* DBI Read-Only Write Enable Register */ +#define PCIE_IATU_NUM 6 + struct ls_pcie_drvdata { u32 lut_offset; u32 ltssm_shift; @@ -91,6 +93,14 @@ static void ls_pcie_drop_msg_tlp(struct ls_pcie *pcie) iowrite32(val, pci->dbi_base + PCIE_STRFMR1); } +static void ls_pcie_disable_outbound_atus(struct ls_pcie *pcie) +{ + int i; + + for (i = 0; i < PCIE_IATU_NUM; i++) + dw_pcie_disable_atu(pcie->pci, DW_PCIE_REGION_OUTBOUND, i); +} + static int ls1021_pcie_link_up(struct dw_pcie *pci) { u32 state; @@ -128,6 +138,13 @@ static int ls_pcie_host_init(struct pcie_port *pp) struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct ls_pcie *pcie = to_ls_pcie(pci); + /* + * Disable outbound windows configured by the bootloader to avoid + * one transaction hitting multiple outbound windows. + * dw_pcie_setup_rc() will reconfigure the outbound windows. + */ + ls_pcie_disable_outbound_atus(pcie); + iowrite32(1, pci->dbi_base + PCIE_DBI_RO_WR_EN); ls_pcie_fix_class(pcie); ls_pcie_clear_multifunction(pcie); |