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author | Gregory CLEMENT <gregory.clement@bootlin.com> | 2018-02-28 17:35:30 +0100 |
---|---|---|
committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2018-03-08 15:23:47 +0000 |
commit | 2435cdd0c3bb8ad067efb1b2f4c992f680c50b7c (patch) | |
tree | bcbab52b378324547f2c988e24ee3c05dfad71dc /drivers/pci/dwc | |
parent | 5dcd7f15ac0c113b46adc80e66dac58024e56e97 (diff) | |
download | op-kernel-dev-2435cdd0c3bb8ad067efb1b2f4c992f680c50b7c.zip op-kernel-dev-2435cdd0c3bb8ad067efb1b2f4c992f680c50b7c.tar.gz |
PCI: armada8k: Fix clock resource by adding a register clock
On Armada 7K/8K we need to explicitly enable the register clock. This
clock is optional because not all the SoCs using this IP need it but at
least for Armada 7K/8K it is actually mandatory.
The binding documentation is updated accordingly.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Diffstat (limited to 'drivers/pci/dwc')
-rw-r--r-- | drivers/pci/dwc/pcie-armada8k.c | 18 |
1 files changed, 16 insertions, 2 deletions
diff --git a/drivers/pci/dwc/pcie-armada8k.c b/drivers/pci/dwc/pcie-armada8k.c index f9b1aec..072fd7e 100644 --- a/drivers/pci/dwc/pcie-armada8k.c +++ b/drivers/pci/dwc/pcie-armada8k.c @@ -28,6 +28,7 @@ struct armada8k_pcie { struct dw_pcie *pci; struct clk *clk; + struct clk *clk_reg; }; #define PCIE_VENDOR_REGS_OFFSET 0x8000 @@ -229,23 +230,36 @@ static int armada8k_pcie_probe(struct platform_device *pdev) if (ret) return ret; + pcie->clk_reg = devm_clk_get(dev, "reg"); + if (pcie->clk_reg == ERR_PTR(-EPROBE_DEFER)) { + ret = -EPROBE_DEFER; + goto fail; + } + if (!IS_ERR(pcie->clk_reg)) { + ret = clk_prepare_enable(pcie->clk_reg); + if (ret) + goto fail_clkreg; + } + /* Get the dw-pcie unit configuration/control registers base. */ base = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl"); pci->dbi_base = devm_pci_remap_cfg_resource(dev, base); if (IS_ERR(pci->dbi_base)) { dev_err(dev, "couldn't remap regs base %p\n", base); ret = PTR_ERR(pci->dbi_base); - goto fail; + goto fail_clkreg; } platform_set_drvdata(pdev, pcie); ret = armada8k_add_pcie_port(pcie, pdev); if (ret) - goto fail; + goto fail_clkreg; return 0; +fail_clkreg: + clk_disable_unprepare(pcie->clk_reg); fail: clk_disable_unprepare(pcie->clk); |