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authorFenghua Yu <fenghua.yu@intel.com>2009-04-24 17:30:20 -0700
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-04-29 06:54:34 +0100
commit4ed0d3e6c64cfd9ba4ceb2099b10d1cf8ece4320 (patch)
tree950bacfaf57040aafbcc2ea9b52eb171d35c23bd /drivers/pci/dmar.c
parent091069740304c979f957ceacec39c461d0192158 (diff)
downloadop-kernel-dev-4ed0d3e6c64cfd9ba4ceb2099b10d1cf8ece4320.zip
op-kernel-dev-4ed0d3e6c64cfd9ba4ceb2099b10d1cf8ece4320.tar.gz
Intel IOMMU Pass Through Support
The patch adds kernel parameter intel_iommu=pt to set up pass through mode in context mapping entry. This disables DMAR in linux kernel; but KVM still runs on VT-d and interrupt remapping still works. In this mode, kernel uses swiotlb for DMA API functions but other VT-d functionalities are enabled for KVM. KVM always uses multi level translation page table in VT-d. By default, pass though mode is disabled in kernel. This is useful when people don't want to enable VT-d DMAR in kernel but still want to use KVM and interrupt remapping for reasons like DMAR performance concern or debug purpose. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Weidong Han <weidong@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/pci/dmar.c')
-rw-r--r--drivers/pci/dmar.c11
1 files changed, 10 insertions, 1 deletions
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index fa3a113..d3d86b7 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -515,6 +515,7 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
u32 ver;
static int iommu_allocated = 0;
int agaw = 0;
+ int msagaw = 0;
iommu = kzalloc(sizeof(*iommu), GFP_KERNEL);
if (!iommu)
@@ -535,12 +536,20 @@ int alloc_iommu(struct dmar_drhd_unit *drhd)
agaw = iommu_calculate_agaw(iommu);
if (agaw < 0) {
printk(KERN_ERR
- "Cannot get a valid agaw for iommu (seq_id = %d)\n",
+ "Cannot get a valid agaw for iommu (seq_id = %d)\n",
+ iommu->seq_id);
+ goto error;
+ }
+ msagaw = iommu_calculate_max_sagaw(iommu);
+ if (msagaw < 0) {
+ printk(KERN_ERR
+ "Cannot get a valid max agaw for iommu (seq_id = %d)\n",
iommu->seq_id);
goto error;
}
#endif
iommu->agaw = agaw;
+ iommu->msagaw = msagaw;
/* the registers might be more than one page */
map_size = max_t(int, ecap_max_iotlb_offset(iommu->ecap),
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