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author | Mike Miller <mike.miller@hp.com> | 2006-01-08 01:03:50 -0800 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-01-08 20:14:00 -0800 |
commit | fb86a35b9ded8a7e53a432cbf28df603cdd4849c (patch) | |
tree | 6cfc9de386c26f5b1c9a126aee2bdc8f80bc8e2b /drivers/parisc | |
parent | d09cf7d77f62f6fb2f6d63fe5980583805f2d559 (diff) | |
download | op-kernel-dev-fb86a35b9ded8a7e53a432cbf28df603cdd4849c.zip op-kernel-dev-fb86a35b9ded8a7e53a432cbf28df603cdd4849c.tar.gz |
[PATCH] cciss: adds MSI and MSI-X support
This creates a new function, cciss_interrupt_mode called from
cciss_pci_init. This function determines what type of interrupt vector to
use, i.e., MSI, MSI-X, or IO-APIC.
One noticeable difference is changing the interrupt field of the controller
struct to an array of 4 unsigned ints. The Smart Array HW is capable of
generating 4 distinct interrupts depending on the transport method in use
during operation. These are:
#define DOORBELL_INT 0
Used to notify the contoller of configuration updates. We only use
this feature when in polling mode.
#define PERF_MODE_INT 0
Used when the controller is in Performant Mode.
#define SIMPLE_MODE_INT 2
Used when the controller is in Simple Mode (current Linux implementation).
#define MEMQ_INT_MODE 3
Not used.
When using IO-APIC interrupts these 4 lines are OR'ed together so when any
one fires an interrupt an is generated. In MSI or MSI-X mode this hardware
OR'ing is ignored. We must register for our interrupt depending on what
mode the controller is running. For Linux we use SIMPLE_MODE_INT
exclusively at this time. Please consider this for inclusion.
Signed-off-by: Mike Miller <mike.miller@hp.com>
Cc: Jens Axboe <axboe@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/parisc')
0 files changed, 0 insertions, 0 deletions