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authorPavel Pisa <ppisa@pikron.com>2006-09-07 15:53:29 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-09-07 15:53:29 +0100
commit148f93d59cc9bb5e0f9a04d36a6f91d435e1a3f7 (patch)
tree1a413a79d37661199786f6fe2db3fe8bd7b5556a /drivers/oprofile
parent385e3227d4d83ab13d7767c4bb3593b0256bf246 (diff)
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[ARM] 3751/1: i.MX/MX1 SD/MMC use 512 bytes request for SCR read
Patch from Pavel Pisa This is another approach to SDHC deficiency workaround. It seems, that previous solution based on 16 bytes (FIFO length size) read is still timing sensitive on genirq and fully preemptive kernels. The new solution is backuped by M9328 UM statement, that only 512 byte block are working properly and by 2.4.26 FreeScale's SDHC code. Jay Monkman reports significant improvement on code based on this driver after applying this change on MX21 as well. Signed-off-by: Pavel Pisa <pisa@cmp.felk.cvut.cz> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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