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authorAida Mynzhasova <aida.mynzhasova@skitlab.ru>2013-09-25 11:24:23 +0400
committerDavid S. Miller <davem@davemloft.net>2013-09-30 14:49:47 -0400
commit894116bd0e9b7749a0c4b6c62dec13c2a0ccef68 (patch)
treea3e9709ce7d977964417ed27e531763fa7526e5a /drivers/net
parent559835ea7292e2f09304d81eda16f4209433245e (diff)
downloadop-kernel-dev-894116bd0e9b7749a0c4b6c62dec13c2a0ccef68.zip
op-kernel-dev-894116bd0e9b7749a0c4b6c62dec13c2a0ccef68.tar.gz
powerpc/83xx: gianfar_ptp: select 1588 clock source through dts file
Currently IEEE 1588 timer reference clock source is determined through hard-coded value in gianfar_ptp driver. This patch allows to select ptp clock source by means of device tree file node. For instance: fsl,cksel = <0>; for using external (TSEC_TMR_CLK input) high precision timer reference clock. Other acceptable values: <1> : eTSEC system clock <2> : eTSEC1 transmit clock <3> : RTC clock input When this attribute isn't used, eTSEC system clock will serve as IEEE 1588 timer reference clock. Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/ethernet/freescale/gianfar_ptp.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/freescale/gianfar_ptp.c b/drivers/net/ethernet/freescale/gianfar_ptp.c
index 098f133..e006a09 100644
--- a/drivers/net/ethernet/freescale/gianfar_ptp.c
+++ b/drivers/net/ethernet/freescale/gianfar_ptp.c
@@ -452,7 +452,9 @@ static int gianfar_ptp_probe(struct platform_device *dev)
err = -ENODEV;
etsects->caps = ptp_gianfar_caps;
- etsects->cksel = DEFAULT_CKSEL;
+
+ if (get_of_u32(node, "fsl,cksel", &etsects->cksel))
+ etsects->cksel = DEFAULT_CKSEL;
if (get_of_u32(node, "fsl,tclk-period", &etsects->tclk_period) ||
get_of_u32(node, "fsl,tmr-prsc", &etsects->tmr_prsc) ||
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