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authorMichael Buesch <mb@bu3sch.de>2008-04-05 15:02:09 +0200
committerJohn W. Linville <linville@tuxdriver.com>2008-04-08 16:44:43 -0400
commitc97a4ccc1fad35d3d183900af29c171b6d56b7f9 (patch)
tree92689f21bed8d747e91c7ef79f43399f34e767ac /drivers/net
parent84363e6e07f17f8cc580065260907ee3f0520485 (diff)
downloadop-kernel-dev-c97a4ccc1fad35d3d183900af29c171b6d56b7f9.zip
op-kernel-dev-c97a4ccc1fad35d3d183900af29c171b6d56b7f9.tar.gz
b43: Fix beacon BH update
This fixes beacon updating in the bottomhalf. In case the device is busy, we will defer to later in the IRQ handler. Signed-off-by: Michael Buesch <mb@bu3sch.de> Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/wireless/b43/b43.h1
-rw-r--r--drivers/net/wireless/b43/main.c95
2 files changed, 54 insertions, 42 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index bf6b276..4ba4a73 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -411,7 +411,6 @@ enum {
#define B43_IRQ_ALL 0xFFFFFFFF
#define B43_IRQ_MASKTEMPLATE (B43_IRQ_MAC_SUSPENDED | \
- B43_IRQ_BEACON | \
B43_IRQ_TBTT_INDI | \
B43_IRQ_ATIM_END | \
B43_IRQ_PMQ | \
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index c98337b..ec28a6e 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -1448,6 +1448,53 @@ static void b43_write_probe_resp_template(struct b43_wldev *dev,
kfree(probe_resp_data);
}
+static void handle_irq_beacon(struct b43_wldev *dev)
+{
+ struct b43_wl *wl = dev->wl;
+ u32 cmd, beacon0_valid, beacon1_valid;
+
+ if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
+ return;
+
+ /* This is the bottom half of the asynchronous beacon update. */
+
+ /* Ignore interrupt in the future. */
+ dev->irq_savedstate &= ~B43_IRQ_BEACON;
+
+ cmd = b43_read32(dev, B43_MMIO_MACCMD);
+ beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
+ beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
+
+ /* Schedule interrupt manually, if busy. */
+ if (beacon0_valid && beacon1_valid) {
+ b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON);
+ dev->irq_savedstate |= B43_IRQ_BEACON;
+ return;
+ }
+
+ if (!beacon0_valid) {
+ if (!wl->beacon0_uploaded) {
+ b43_write_beacon_template(dev, 0x68, 0x18,
+ B43_CCK_RATE_1MB);
+ b43_write_probe_resp_template(dev, 0x268, 0x4A,
+ &__b43_ratetable[3]);
+ wl->beacon0_uploaded = 1;
+ }
+ cmd = b43_read32(dev, B43_MMIO_MACCMD);
+ cmd |= B43_MACCMD_BEACON0_VALID;
+ b43_write32(dev, B43_MMIO_MACCMD, cmd);
+ } else if (!beacon1_valid) {
+ if (!wl->beacon1_uploaded) {
+ b43_write_beacon_template(dev, 0x468, 0x1A,
+ B43_CCK_RATE_1MB);
+ wl->beacon1_uploaded = 1;
+ }
+ cmd = b43_read32(dev, B43_MMIO_MACCMD);
+ cmd |= B43_MACCMD_BEACON1_VALID;
+ b43_write32(dev, B43_MMIO_MACCMD, cmd);
+ }
+}
+
static void b43_beacon_update_trigger_work(struct work_struct *work)
{
struct b43_wl *wl = container_of(work, struct b43_wl,
@@ -1457,13 +1504,14 @@ static void b43_beacon_update_trigger_work(struct work_struct *work)
mutex_lock(&wl->mutex);
dev = wl->current_dev;
if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) {
- /* Force the microcode to trigger the
- * beacon update bottom-half IRQ. */
spin_lock_irq(&wl->irq_lock);
- b43_write32(dev, B43_MMIO_MACCMD,
- b43_read32(dev, B43_MMIO_MACCMD)
- | B43_MACCMD_BEACON0_VALID
- | B43_MACCMD_BEACON1_VALID);
+ /* update beacon right away or defer to irq */
+ dev->irq_savedstate = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
+ handle_irq_beacon(dev);
+ /* The handler might have updated the IRQ mask. */
+ b43_write32(dev, B43_MMIO_GEN_IRQ_MASK,
+ dev->irq_savedstate);
+ mmiowb();
spin_unlock_irq(&wl->irq_lock);
}
mutex_unlock(&wl->mutex);
@@ -1520,41 +1568,6 @@ static void b43_set_beacon_int(struct b43_wldev *dev, u16 beacon_int)
b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
}
-static void handle_irq_beacon(struct b43_wldev *dev)
-{
- struct b43_wl *wl = dev->wl;
- u32 cmd, beacon0_valid, beacon1_valid;
-
- if (!b43_is_mode(wl, IEEE80211_IF_TYPE_AP))
- return;
-
- /* This is the bottom half of the asynchronous beacon update. */
-
- cmd = b43_read32(dev, B43_MMIO_MACCMD);
- beacon0_valid = (cmd & B43_MACCMD_BEACON0_VALID);
- beacon1_valid = (cmd & B43_MACCMD_BEACON1_VALID);
- cmd &= ~(B43_MACCMD_BEACON0_VALID | B43_MACCMD_BEACON1_VALID);
-
- if (!beacon0_valid) {
- if (!wl->beacon0_uploaded) {
- b43_write_beacon_template(dev, 0x68, 0x18,
- B43_CCK_RATE_1MB);
- b43_write_probe_resp_template(dev, 0x268, 0x4A,
- &__b43_ratetable[3]);
- wl->beacon0_uploaded = 1;
- }
- cmd |= B43_MACCMD_BEACON0_VALID;
- } else if (!beacon1_valid) {
- if (!wl->beacon1_uploaded) {
- b43_write_beacon_template(dev, 0x468, 0x1A,
- B43_CCK_RATE_1MB);
- wl->beacon1_uploaded = 1;
- }
- cmd |= B43_MACCMD_BEACON1_VALID;
- }
- b43_write32(dev, B43_MMIO_MACCMD, cmd);
-}
-
static void handle_irq_ucode_debug(struct b43_wldev *dev)
{
//TODO
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