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authorFrancois Romieu <romieu@fr.zoreil.com>2007-10-18 15:20:43 +0200
committerFrancois Romieu <romieu@fr.zoreil.com>2007-10-18 21:26:17 +0200
commit7da97ec96a0934319c7fbedd3d38baf533e20640 (patch)
treea4211d9d085a5679e2393e3584f1857a802fe14e /drivers/net
parenta3f8067186c8d8459a20644b690f3a02131a3e37 (diff)
downloadop-kernel-dev-7da97ec96a0934319c7fbedd3d38baf533e20640.zip
op-kernel-dev-7da97ec96a0934319c7fbedd3d38baf533e20640.tar.gz
r8169: more phy init for the 8168
Realtek's r8168 driver version 8.003.00 adds new init sequences (they do not appear in version 8.002.00). Signed-off-by: Francois Romieu <romieu@fr.zoreil.com> Cc: Edward Hsu <edward_hsu@realtek.com.tw>
Diffstat (limited to 'drivers/net')
-rw-r--r--drivers/net/r8169.c34
1 files changed, 34 insertions, 0 deletions
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 8ffd573..e8960f2 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1243,6 +1243,16 @@ static void rtl8169sb_hw_phy_config(void __iomem *ioaddr)
rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}
+static void rtl8168b_hw_phy_config(void __iomem *ioaddr)
+{
+ struct phy_reg phy_reg_init[] = {
+ { 0x1f, 0x0000 },
+ { 0x10, 0xf41b },
+ { 0x1f, 0x0000 }
+ };
+
+ rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
static void rtl8168cp_hw_phy_config(void __iomem *ioaddr)
{
@@ -1279,6 +1289,22 @@ static void rtl8168c_hw_phy_config(void __iomem *ioaddr)
rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
}
+static void rtl8168cx_hw_phy_config(void __iomem *ioaddr)
+{
+ struct phy_reg phy_reg_init[] = {
+ { 0x1f, 0x0000 },
+ { 0x12, 0x2300 },
+ { 0x1f, 0x0003 },
+ { 0x16, 0x0f0a },
+ { 0x1f, 0x0000 },
+ { 0x1f, 0x0002 },
+ { 0x0c, 0x7eb8 },
+ { 0x1f, 0x0000 }
+ };
+
+ rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
+}
+
static void rtl_hw_phy_config(struct net_device *dev)
{
struct rtl8169_private *tp = netdev_priv(dev);
@@ -1296,12 +1322,20 @@ static void rtl_hw_phy_config(struct net_device *dev)
case RTL_GIGA_MAC_VER_04:
rtl8169sb_hw_phy_config(ioaddr);
break;
+ case RTL_GIGA_MAC_VER_11:
+ case RTL_GIGA_MAC_VER_12:
+ case RTL_GIGA_MAC_VER_17:
+ rtl8168b_hw_phy_config(ioaddr);
+ break;
case RTL_GIGA_MAC_VER_18:
rtl8168cp_hw_phy_config(ioaddr);
break;
case RTL_GIGA_MAC_VER_19:
rtl8168c_hw_phy_config(ioaddr);
break;
+ case RTL_GIGA_MAC_VER_20:
+ rtl8168cx_hw_phy_config(ioaddr);
+ break;
default:
break;
}
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