diff options
| author | Rajkumar Manoharan <rmanohar@qti.qualcomm.com> | 2015-05-29 17:51:53 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@qca.qualcomm.com> | 2015-06-01 10:00:41 +0300 |
| commit | 163f52647a0f7e34e803b51456c60deedd26ca1d (patch) | |
| tree | 69dcdae63464cfafd8de22a3a93589d514235860 /drivers/net/wireless | |
| parent | e451c1dbe6d54988257ee542471ec03374317d93 (diff) | |
| download | op-kernel-dev-163f52647a0f7e34e803b51456c60deedd26ca1d.zip op-kernel-dev-163f52647a0f7e34e803b51456c60deedd26ca1d.tar.gz | |
ath10k: bypass PLL setting on target init for QCA9888
Some of of qca988x solutions are having global reset issue
during target initialization. Bypassing PLL setting before
downloading firmware and letting the SoC run on REF_CLK is fixing
the problem. Corresponding firmware change is also needed to set
the clock source once the target is initialized. Since 10.2.4
firmware is having this ROM patch, applying skip_clock_init only
for 10.2.4 firmware versions.
Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
Diffstat (limited to 'drivers/net/wireless')
| -rw-r--r-- | drivers/net/wireless/ath/ath10k/core.c | 16 | ||||
| -rw-r--r-- | drivers/net/wireless/ath/ath10k/core.h | 3 |
2 files changed, 19 insertions, 0 deletions
diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c index 684d460..59496a9 100644 --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c @@ -1085,6 +1085,22 @@ int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) if (status) goto err; + /* Some of of qca988x solutions are having global reset issue + * during target initialization. Bypassing PLL setting before + * downloading firmware and letting the SoC run on REF_CLK is + * fixing the problem. Corresponding firmware change is also needed + * to set the clock source once the target is initialized. + */ + if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, + ar->fw_features)) { + status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); + if (status) { + ath10k_err(ar, "could not write to skip_clock_init: %d\n", + status); + goto err; + } + } + status = ath10k_download_fw(ar, mode); if (status) goto err; diff --git a/drivers/net/wireless/ath/ath10k/core.h b/drivers/net/wireless/ath/ath10k/core.h index 87376b3..45f9603 100644 --- a/drivers/net/wireless/ath/ath10k/core.h +++ b/drivers/net/wireless/ath/ath10k/core.h @@ -468,6 +468,9 @@ enum ath10k_fw_features { */ ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING, + /* Firmware supports bypassing PLL setting on init. */ + ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, + /* keep last */ ATH10K_FW_FEATURE_COUNT, }; |
