diff options
| author | Wey-Yi Guy <wey-yi.w.guy@intel.com> | 2010-01-15 13:43:39 -0800 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2010-01-19 16:25:12 -0500 |
| commit | 1b3eb8236ad9369ae519216b61a3d22806370115 (patch) | |
| tree | 910be6c299c9f9dbd57903d7003a6967d1e9fc38 /drivers/net/wireless/iwlwifi/iwl-fh.h | |
| parent | 2a11df6ee58d1b1fc7e5ecd7593a04d7555dc522 (diff) | |
| download | op-kernel-dev-1b3eb8236ad9369ae519216b61a3d22806370115.zip op-kernel-dev-1b3eb8236ad9369ae519216b61a3d22806370115.tar.gz | |
iwlwifi: display flowhandler register when sw error or on-demand
Flowhandler handle the communication between driver and uCode, when any
uCode error happen, we also like to know what is the status of the
flowhandler; it can help to debug flowhandler related problem.
Also adding debugfs file to dump current value of flowhandler registers.
Signed-off-by: Wey-Yi Guy <wey-yi.w.guy@intel.com>
Signed-off-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-fh.h')
| -rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-fh.h | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-fh.h b/drivers/net/wireless/iwlwifi/iwl-fh.h index 65fa8a69..1342cf4 100644 --- a/drivers/net/wireless/iwlwifi/iwl-fh.h +++ b/drivers/net/wireless/iwlwifi/iwl-fh.h @@ -379,6 +379,25 @@ #define FH_TSSR_TX_STATUS_REG (FH_TSSR_LOWER_BOUND + 0x010) +/** + * Bit fields for TSSR(Tx Shared Status & Control) error status register: + * 31: Indicates an address error when accessed to internal memory + * uCode/driver must write "1" in order to clear this flag + * 30: Indicates that Host did not send the expected number of dwords to FH + * uCode/driver must write "1" in order to clear this flag + * 16-9:Each status bit is for one channel. Indicates that an (Error) ActDMA + * command was received from the scheduler while the TRB was already full + * with previous command + * uCode/driver must write "1" in order to clear this flag + * 7-0: Each status bit indicates a channel's TxCredit error. When an error + * bit is set, it indicates that the FH has received a full indication + * from the RTC TxFIFO and the current value of the TxCredit counter was + * not equal to zero. This mean that the credit mechanism was not + * synchronized to the TxFIFO status + * uCode/driver must write "1" in order to clear this flag + */ +#define FH_TSSR_TX_ERROR_REG (FH_TSSR_LOWER_BOUND + 0x018) + #define FH_TSSR_TX_STATUS_REG_BIT_BUFS_EMPTY(_chnl) ((1 << (_chnl)) << 24) #define FH_TSSR_TX_STATUS_REG_BIT_NO_PEND_REQ(_chnl) ((1 << (_chnl)) << 16) |
