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author | Rafał Miłecki <zajec5@gmail.com> | 2014-08-07 07:45:37 +0200 |
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committer | John W. Linville <linville@tuxdriver.com> | 2014-08-25 16:00:42 -0400 |
commit | 25c15566635fef86e87f762f73a19f24598e45fa (patch) | |
tree | 553e99060b077c95aa0096b1351e480219ccbfa5 /drivers/net/wireless/b43/phy_a.c | |
parent | d342b95dd735014a590f9051b1ba227eb54ca8f6 (diff) | |
download | op-kernel-dev-25c15566635fef86e87f762f73a19f24598e45fa.zip op-kernel-dev-25c15566635fef86e87f762f73a19f24598e45fa.tar.gz |
b43: flush some writes on Broadcom MIPS SoCs
Access to PHY and radio registers is indirect on Broadcom hardware and
it seems that addressing on some MIPS SoCs may require flushing. So far
this problem was noticed on 0x4716 SoC only (marketing names: BCM4717,
BCM4718).
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/b43/phy_a.c')
-rw-r--r-- | drivers/net/wireless/b43/phy_a.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/wireless/b43/phy_a.c b/drivers/net/wireless/b43/phy_a.c index 25e4043..99c036f 100644 --- a/drivers/net/wireless/b43/phy_a.c +++ b/drivers/net/wireless/b43/phy_a.c @@ -444,14 +444,14 @@ static inline u16 adjust_phyreg(struct b43_wldev *dev, u16 offset) static u16 b43_aphy_op_read(struct b43_wldev *dev, u16 reg) { reg = adjust_phyreg(dev, reg); - b43_write16(dev, B43_MMIO_PHY_CONTROL, reg); + b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); return b43_read16(dev, B43_MMIO_PHY_DATA); } static void b43_aphy_op_write(struct b43_wldev *dev, u16 reg, u16 value) { reg = adjust_phyreg(dev, reg); - b43_write16(dev, B43_MMIO_PHY_CONTROL, reg); + b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_write16(dev, B43_MMIO_PHY_DATA, value); } |