diff options
| author | Nick Kossifidis <mickflemm@gmail.com> | 2011-11-25 20:40:24 +0200 |
|---|---|---|
| committer | John W. Linville <linville@tuxdriver.com> | 2011-11-28 14:44:15 -0500 |
| commit | 1846ac3dbec0894095520b2756b68c4fd81e3fbb (patch) | |
| tree | a4e5215b05ded63d3ee516d03312c30243d05b4f /drivers/net/wireless/ath/ath5k/reset.c | |
| parent | ce169aca0d823d38465127023e3d571816e6666c (diff) | |
| download | op-kernel-dev-1846ac3dbec0894095520b2756b68c4fd81e3fbb.zip op-kernel-dev-1846ac3dbec0894095520b2756b68c4fd81e3fbb.tar.gz | |
ath5k: Use usleep_range where possible
Use usleep_range where possible to reduce busy waits
Signed-off-by: Nick Kossifidis <mickflemm@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'drivers/net/wireless/ath/ath5k/reset.c')
| -rw-r--r-- | drivers/net/wireless/ath/ath5k/reset.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/net/wireless/ath/ath5k/reset.c b/drivers/net/wireless/ath/ath5k/reset.c index 2abac25..de28be4 100644 --- a/drivers/net/wireless/ath/ath5k/reset.c +++ b/drivers/net/wireless/ath/ath5k/reset.c @@ -357,7 +357,7 @@ static int ath5k_hw_nic_reset(struct ath5k_hw *ah, u32 val) ath5k_hw_reg_write(ah, val, AR5K_RESET_CTL); /* Wait at least 128 PCI clocks */ - udelay(15); + usleep_range(15, 20); if (ah->ah_version == AR5K_AR5210) { val &= AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_DMA @@ -422,7 +422,7 @@ static int ath5k_hw_wisoc_reset(struct ath5k_hw *ah, u32 flags) regval = __raw_readl(reg); __raw_writel(regval | val, reg); regval = __raw_readl(reg); - udelay(100); + usleep_range(100, 150); /* Bring BB/MAC out of reset */ __raw_writel(regval & ~val, reg); @@ -493,7 +493,7 @@ static int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, ath5k_hw_reg_write(ah, data | AR5K_SLEEP_CTL_SLE_WAKE, AR5K_SLEEP_CTL); - udelay(15); + usleep_range(15, 20); for (i = 200; i > 0; i--) { /* Check if the chip did wake up */ @@ -502,7 +502,7 @@ static int ath5k_hw_set_power(struct ath5k_hw *ah, enum ath5k_power_mode mode, break; /* Wait a bit and retry */ - udelay(50); + usleep_range(50, 75); ath5k_hw_reg_write(ah, data | AR5K_SLEEP_CTL_SLE_WAKE, AR5K_SLEEP_CTL); } @@ -563,7 +563,7 @@ int ath5k_hw_on_hold(struct ath5k_hw *ah) ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_DMA | AR5K_RESET_CTL_PHY | AR5K_RESET_CTL_PCI); - mdelay(2); + usleep_range(2000, 2500); } else { ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_BASEBAND | bus_flags); @@ -621,7 +621,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel) ret = ath5k_hw_nic_reset(ah, AR5K_RESET_CTL_PCU | AR5K_RESET_CTL_MAC | AR5K_RESET_CTL_DMA | AR5K_RESET_CTL_PHY | AR5K_RESET_CTL_PCI); - mdelay(2); + usleep_range(2000, 2500); } else { if (ath5k_get_bus_type(ah) == ATH_AHB) ret = ath5k_hw_wisoc_reset(ah, AR5K_RESET_CTL_PCU | @@ -739,7 +739,7 @@ int ath5k_hw_nic_wakeup(struct ath5k_hw *ah, struct ieee80211_channel *channel) /* ...update PLL if needed */ if (ath5k_hw_reg_read(ah, AR5K_PHY_PLL) != clock) { ath5k_hw_reg_write(ah, clock, AR5K_PHY_PLL); - udelay(300); + usleep_range(300, 350); } /* ...set the PHY operating mode */ |
