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author | Nimrod Andy <B38611@freescale.com> | 2014-10-15 17:30:12 +0800 |
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committer | David S. Miller <davem@davemloft.net> | 2014-10-15 16:40:11 -0400 |
commit | 28b5f058cf1d268d965894ce42a614d13f853dd6 (patch) | |
tree | 279c57e8845b5024e5c9363989560fe3d079d2c6 /drivers/net/virtio_net.c | |
parent | 001586a737ee8c11a1198c352c5635f19fd090ed (diff) | |
download | op-kernel-dev-28b5f058cf1d268d965894ce42a614d13f853dd6.zip op-kernel-dev-28b5f058cf1d268d965894ce42a614d13f853dd6.tar.gz |
net: fec: ptp: fix convergence issue to support LinuxPTP stack
iMX6SX IEEE 1588 module has one hw issue in capturing the ATVR register.
The current SW flow is:
ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK;
ts_counter_ns = ENET0->ATVR;
The ATVR value is not expected value that cause LinuxPTP stack cannot be convergent.
ENET Block Guide/ Chapter for the iMX6SX (PELE) address the issue:
After set ENET_ATCR[Capture], there need some time cycles before the counter
value is capture in the register clock domain. The wait-time-cycles is at least
6 clock cycles of the slower clock between the register clock and the 1588 clock.
So need something like:
ENET0->ATCR |= ENET_ATCR_CAPTURE_MASK;
wait();
ts_counter_ns = ENET0->ATVR;
For iMX6SX, the 1588 ts_clk is fixed to 25Mhz, register clock is 66Mhz, so the
wait-time-cycles must be greater than 240ns (40ns * 6). The patch add 1us delay
before cpu read ATVR register.
Changes V2:
Modify the commit/comments log to describe the issue clearly.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Richard Cochran <richardcochran@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/virtio_net.c')
0 files changed, 0 insertions, 0 deletions