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| author | Grant Likely <grant.likely@secretlab.ca> | 2009-06-17 13:16:04 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-06-17 18:46:43 -0700 |
| commit | f3a32500ba8f3ec9ee0c12836fcfd315f1256db4 (patch) | |
| tree | fecc1148c135213d6f82130de46e6196e57a59a8 /drivers/net/ucc_geth.h | |
| parent | 603a8bbe62e54108055fca46ecdd611c10c6cd0a (diff) | |
| download | op-kernel-dev-f3a32500ba8f3ec9ee0c12836fcfd315f1256db4.zip op-kernel-dev-f3a32500ba8f3ec9ee0c12836fcfd315f1256db4.tar.gz | |
Revert "net/ucc_geth: Add SGMII support for UEC GETH driver"
This reverts commit 047584ce94108012288554a5f84585d792cc7f8f.
This patch meshes badly with "net: Rework ucc_geth driver to use
of_mdio infrastructure" (0b9da337dca972e7a4144e298ec3adb8f244d4a4).
Since most of the patch needs to be reworked, it is clearer to revert
the patch and then apply the corrected version
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ucc_geth.h')
| -rw-r--r-- | drivers/net/ucc_geth.h | 28 |
1 files changed, 1 insertions, 27 deletions
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index deb962b..dca628a 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h @@ -1,5 +1,5 @@ /* - * Copyright (C) Freescale Semicondutor, Inc. 2006-2009. All rights reserved. + * Copyright (C) Freescale Semicondutor, Inc. 2006. All rights reserved. * * Author: Shlomi Gridish <gridish@freescale.com> * @@ -193,31 +193,6 @@ struct ucc_geth { #define ENET_TBI_MII_JD 0x10 /* Jitter diagnostics */ #define ENET_TBI_MII_TBICON 0x11 /* TBI control */ -/* TBI MDIO register bit fields*/ -#define TBISR_LSTATUS 0x0004 -#define TBICON_CLK_SELECT 0x0020 -#define TBIANA_ASYMMETRIC_PAUSE 0x0100 -#define TBIANA_SYMMETRIC_PAUSE 0x0080 -#define TBIANA_HALF_DUPLEX 0x0040 -#define TBIANA_FULL_DUPLEX 0x0020 -#define TBICR_PHY_RESET 0x8000 -#define TBICR_ANEG_ENABLE 0x1000 -#define TBICR_RESTART_ANEG 0x0200 -#define TBICR_FULL_DUPLEX 0x0100 -#define TBICR_SPEED1_SET 0x0040 - -#define TBIANA_SETTINGS ( \ - TBIANA_ASYMMETRIC_PAUSE \ - | TBIANA_SYMMETRIC_PAUSE \ - | TBIANA_FULL_DUPLEX \ - ) -#define TBICR_SETTINGS ( \ - TBICR_PHY_RESET \ - | TBICR_ANEG_ENABLE \ - | TBICR_FULL_DUPLEX \ - | TBICR_SPEED1_SET \ - ) - /* UCC GETH MACCFG1 (MAC Configuration 1 Register) */ #define MACCFG1_FLOW_RX 0x00000020 /* Flow Control Rx */ @@ -1213,7 +1188,6 @@ struct ucc_geth_private { struct ugeth_mii_info *mii_info; struct phy_device *phydev; - struct phy_device *tbiphy; phy_interface_t phy_interface; int max_speed; uint32_t msg_enable; |
