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authorMatt Carlson <mcarlson@broadcom.com>2009-11-02 14:24:36 +0000
committerDavid S. Miller <davem@davemloft.net>2009-11-02 23:39:01 -0800
commit3f0e3ad72393db9c2932a2ca86cc1a49294bbc63 (patch)
treeabba6a3c1d5cdb6a3fe05d79a78c45c41ae7bc71 /drivers/net/tg3.h
parentf40386c8452f9eead9c5906bfffaaf59f3dc748f (diff)
downloadop-kernel-dev-3f0e3ad72393db9c2932a2ca86cc1a49294bbc63.zip
op-kernel-dev-3f0e3ad72393db9c2932a2ca86cc1a49294bbc63.tar.gz
tg3: Convert PHY_ADDR => TG3_PHY_MII_ADDR
This patch renames the PHY_ADDR preprocessor definition. The following patch will identify a new member on the MDIO bus, so we want this preprocessor definition to be a little more descriptive. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
-rw-r--r--drivers/net/tg3.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index eb4ed82..40501cb 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -1954,7 +1954,7 @@
#define NIC_SRAM_MBUF_POOL_SIZE5705 0x0000e000
/* Currently this is fixed. */
-#define PHY_ADDR 0x01
+#define TG3_PHY_MII_ADDR 0x01
/* Tigon3 specific PHY MII registers. */
#define TG3_BMCR_SPEED1000 0x0040
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