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| author | Matt Carlson <mcarlson@broadcom.com> | 2009-09-01 13:20:17 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2009-09-02 00:44:06 -0700 |
| commit | a1b950d56de3c72bea3343f54de24c43fb7dc74e (patch) | |
| tree | f54f22cec072bbc17ec963ddc3e832ccf4db7bc0 /drivers/net/tg3.h | |
| parent | f6eb9b1fc1411d22c073f5264e5630a541d0f7df (diff) | |
| download | op-kernel-dev-a1b950d56de3c72bea3343f54de24c43fb7dc74e.zip op-kernel-dev-a1b950d56de3c72bea3343f54de24c43fb7dc74e.tar.gz | |
tg3: Add 5717 NVRAM detection routines
This patch adds NVRAM detection routines for the 5717.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/tg3.h')
| -rw-r--r-- | drivers/net/tg3.h | 23 |
1 files changed, 22 insertions, 1 deletions
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index 5994476..ea57a3a 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h @@ -1027,8 +1027,10 @@ #define TG3_CPMU_HST_ACC 0x0000361c #define CPMU_HST_ACC_MACCLK_MASK 0x001f0000 #define CPMU_HST_ACC_MACCLK_6_25 0x00130000 -/* 0x3620 --> 0x3630 unused */ +/* 0x3620 --> 0x362c unused */ +#define TG3_CPMU_STATUS 0x0000362c +#define TG3_CPMU_STATUS_PCIE_FUNC 0x20000000 #define TG3_CPMU_CLCK_STAT 0x00003630 #define CPMU_CLCK_STAT_MAC_CLCK_MASK 0x001f0000 #define CPMU_CLCK_STAT_MAC_CLCK_62_5 0x00000000 @@ -1692,6 +1694,25 @@ #define FLASH_57780VENDOR_ATMEL_AT45DB021B 0x03400002 #define FLASH_57780VENDOR_ATMEL_AT45DB041D 0x00400001 #define FLASH_57780VENDOR_ATMEL_AT45DB041B 0x03400001 +#define FLASH_5717VENDOR_ATMEL_EEPROM 0x02000001 +#define FLASH_5717VENDOR_MICRO_EEPROM 0x02000003 +#define FLASH_5717VENDOR_ATMEL_MDB011D 0x01000001 +#define FLASH_5717VENDOR_ATMEL_MDB021D 0x01000003 +#define FLASH_5717VENDOR_ST_M_M25PE10 0x02000000 +#define FLASH_5717VENDOR_ST_M_M25PE20 0x02000002 +#define FLASH_5717VENDOR_ST_M_M45PE10 0x00000001 +#define FLASH_5717VENDOR_ST_M_M45PE20 0x00000003 +#define FLASH_5717VENDOR_ATMEL_ADB011B 0x01400000 +#define FLASH_5717VENDOR_ATMEL_ADB021B 0x01400002 +#define FLASH_5717VENDOR_ATMEL_ADB011D 0x01400001 +#define FLASH_5717VENDOR_ATMEL_ADB021D 0x01400003 +#define FLASH_5717VENDOR_ST_A_M25PE10 0x02400000 +#define FLASH_5717VENDOR_ST_A_M25PE20 0x02400002 +#define FLASH_5717VENDOR_ST_A_M45PE10 0x02400001 +#define FLASH_5717VENDOR_ST_A_M45PE20 0x02400003 +#define FLASH_5717VENDOR_ATMEL_45USPT 0x03400000 +#define FLASH_5717VENDOR_ST_25USPT 0x03400002 +#define FLASH_5717VENDOR_ST_45USPT 0x03400001 #define NVRAM_CFG1_5752PAGE_SIZE_MASK 0x70000000 #define FLASH_5752PAGE_SIZE_256 0x00000000 #define FLASH_5752PAGE_SIZE_512 0x10000000 |
