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authorBen Hutchings <bhutchings@solarflare.com>2008-12-12 22:00:49 -0800
committerDavid S. Miller <davem@davemloft.net>2008-12-12 22:00:49 -0800
commit6f158d5f29b420438e907d72cb111ddb9973f00a (patch)
tree38d7696c47a706447c6bf8e66f52a5854d781464 /drivers/net/sfc/falcon.c
parente6fa2eb789f49dc51a20d3db0d410bc8158abb43 (diff)
downloadop-kernel-dev-6f158d5f29b420438e907d72cb111ddb9973f00a.zip
op-kernel-dev-6f158d5f29b420438e907d72cb111ddb9973f00a.tar.gz
sfc: Add support for SFN4111T
Add support code for the SFN4111T 100/1000/10GBASE-T reference design, based in part on the existing code for the SFE4001. Signed-off-by: Ben Hutchings <bhutchings@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/sfc/falcon.c')
-rw-r--r--drivers/net/sfc/falcon.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index db8e147..84771a7 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -2971,6 +2971,13 @@ int falcon_init_nic(struct efx_nic *efx)
EFX_SET_OWORD_FIELD(temp, ONCHIP_SRAM, 1);
falcon_write(efx, &temp, NIC_STAT_REG);
+ /* Set the source of the GMAC clock */
+ if (falcon_rev(efx) == FALCON_REV_B0) {
+ falcon_read(efx, &temp, GPIO_CTL_REG_KER);
+ EFX_SET_OWORD_FIELD(temp, GPIO_USE_NIC_CLK, true);
+ falcon_write(efx, &temp, GPIO_CTL_REG_KER);
+ }
+
/* Set buffer table mode */
EFX_POPULATE_OWORD_1(temp, BUF_TBL_MODE, BUF_TBL_MODE_FULL);
falcon_write(efx, &temp, BUF_TBL_CFG_REG_KER);
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