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author | Shengzhou Liu <Shengzhou.Liu@freescale.com> | 2015-06-18 16:42:47 +0800 |
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committer | David S. Miller <davem@davemloft.net> | 2015-06-23 01:06:09 -0700 |
commit | 3447cf2e9a11fd672de8b3cc613eabd97fe82053 (patch) | |
tree | 5d893f5aa545eb10abb5ca270e4930536571355d /drivers/net/phy | |
parent | fa433354f042105fc7a299253f904bb48dae0950 (diff) | |
download | op-kernel-dev-3447cf2e9a11fd672de8b3cc613eabd97fe82053.zip op-kernel-dev-3447cf2e9a11fd672de8b3cc613eabd97fe82053.tar.gz |
net/phy: Add support for Realtek RTL8211F
RTL8211F has different register definitions from RTL8211E.
Specially it needs to enable TXDLY in case of RGMII.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r-- | drivers/net/phy/realtek.c | 68 |
1 files changed, 67 insertions, 1 deletions
diff --git a/drivers/net/phy/realtek.c b/drivers/net/phy/realtek.c index 96a0f0f..4535361 100644 --- a/drivers/net/phy/realtek.c +++ b/drivers/net/phy/realtek.c @@ -22,8 +22,12 @@ #define RTL821x_INER 0x12 #define RTL821x_INER_INIT 0x6400 #define RTL821x_INSR 0x13 +#define RTL8211E_INER_LINK_STATUS 0x400 -#define RTL8211E_INER_LINK_STATUS 0x400 +#define RTL8211F_INER_LINK_STATUS 0x0010 +#define RTL8211F_INSR 0x1d +#define RTL8211F_PAGE_SELECT 0x1f +#define RTL8211F_TX_DELAY 0x100 MODULE_DESCRIPTION("Realtek PHY driver"); MODULE_AUTHOR("Johnson Leung"); @@ -38,6 +42,18 @@ static int rtl821x_ack_interrupt(struct phy_device *phydev) return (err < 0) ? err : 0; } +static int rtl8211f_ack_interrupt(struct phy_device *phydev) +{ + int err; + + phy_write(phydev, RTL8211F_PAGE_SELECT, 0xa43); + err = phy_read(phydev, RTL8211F_INSR); + /* restore to default page 0 */ + phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); + + return (err < 0) ? err : 0; +} + static int rtl8211b_config_intr(struct phy_device *phydev) { int err; @@ -64,6 +80,41 @@ static int rtl8211e_config_intr(struct phy_device *phydev) return err; } +static int rtl8211f_config_intr(struct phy_device *phydev) +{ + int err; + + if (phydev->interrupts == PHY_INTERRUPT_ENABLED) + err = phy_write(phydev, RTL821x_INER, + RTL8211F_INER_LINK_STATUS); + else + err = phy_write(phydev, RTL821x_INER, 0); + + return err; +} + +static int rtl8211f_config_init(struct phy_device *phydev) +{ + int ret; + u16 reg; + + ret = genphy_config_init(phydev); + if (ret < 0) + return ret; + + if (phydev->interface == PHY_INTERFACE_MODE_RGMII) { + /* enable TXDLY */ + phy_write(phydev, RTL8211F_PAGE_SELECT, 0xd08); + reg = phy_read(phydev, 0x11); + reg |= RTL8211F_TX_DELAY; + phy_write(phydev, 0x11, reg); + /* restore to default page 0 */ + phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0); + } + + return 0; +} + static struct phy_driver realtek_drvs[] = { { .phy_id = 0x00008201, @@ -98,6 +149,20 @@ static struct phy_driver realtek_drvs[] = { .suspend = genphy_suspend, .resume = genphy_resume, .driver = { .owner = THIS_MODULE,}, + }, { + .phy_id = 0x001cc916, + .name = "RTL8211F Gigabit Ethernet", + .phy_id_mask = 0x001fffff, + .features = PHY_GBIT_FEATURES, + .flags = PHY_HAS_INTERRUPT, + .config_aneg = &genphy_config_aneg, + .config_init = &rtl8211f_config_init, + .read_status = &genphy_read_status, + .ack_interrupt = &rtl8211f_ack_interrupt, + .config_intr = &rtl8211f_config_intr, + .suspend = genphy_suspend, + .resume = genphy_resume, + .driver = { .owner = THIS_MODULE }, }, }; @@ -106,6 +171,7 @@ module_phy_driver(realtek_drvs); static struct mdio_device_id __maybe_unused realtek_tbl[] = { { 0x001cc912, 0x001fffff }, { 0x001cc915, 0x001fffff }, + { 0x001cc916, 0x001fffff }, { } }; |