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authorStefan Sørensen <stefan.sorensen@spectralink.com>2014-06-27 12:05:29 +0200
committerDavid S. Miller <davem@davemloft.net>2014-07-01 18:52:53 -0700
commit35e872ae6330e72c1b6045c021314b32a4a047de (patch)
treec4a1acb5604427cc20601019d73077f70078a130 /drivers/net/phy
parentb6fd8b7fa1526774ed5dd77243436ece77be20b5 (diff)
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op-kernel-dev-35e872ae6330e72c1b6045c021314b32a4a047de.tar.gz
dp83640: Program pulsewidth2 values of perout triggers 0 and 1
Periodic output triggers 0 and 1 of the dp83640 has a programmable duty-cycle which is controlled by the Pulsewidth2 field of the trigger data register. This field is not documented in the datasheet, but it is described in the "PHYTER Software Development Guide" section 3.1.4.1. Failing to set the field can result in unstable/no trigger output. Add programming of the Pulsewidth2 field, setting it to the same value as the Pulsewidth field for a 50% duty cycle. Signed-off-by: Stefan Sørensen <stefan.sorensen@spectralink.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy')
-rw-r--r--drivers/net/phy/dp83640.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/phy/dp83640.c b/drivers/net/phy/dp83640.c
index 6a999e6..fcd50b77 100644
--- a/drivers/net/phy/dp83640.c
+++ b/drivers/net/phy/dp83640.c
@@ -353,6 +353,11 @@ static int periodic_output(struct dp83640_clock *clock,
ext_write(0, phydev, PAGE4, PTP_TDR, sec >> 16); /* sec[31:16] */
ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff); /* ns[15:0] */
ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16); /* ns[31:16] */
+ /* Triggers 0 and 1 has programmable pulsewidth2 */
+ if (trigger < 2) {
+ ext_write(0, phydev, PAGE4, PTP_TDR, pwidth & 0xffff);
+ ext_write(0, phydev, PAGE4, PTP_TDR, pwidth >> 16);
+ }
/*enable trigger*/
val &= ~TRIG_LOAD;
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