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author | David S. Miller <davem@davemloft.net> | 2017-06-06 21:14:21 -0400 |
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committer | David S. Miller <davem@davemloft.net> | 2017-06-06 21:14:21 -0400 |
commit | 9747e2313838ee8f5d8073fd6aa7289255c3c51b (patch) | |
tree | b0fb2db74a1881f13303261ddd9083328b7500df /drivers/net/phy/phy.c | |
parent | 92046578ac88e0a93f8ef03240e6c832b0189aa7 (diff) | |
parent | 20b2af32ff3f0ac74f2bfd0bc2c175b56002d1f1 (diff) | |
download | op-kernel-dev-9747e2313838ee8f5d8073fd6aa7289255c3c51b.zip op-kernel-dev-9747e2313838ee8f5d8073fd6aa7289255c3c51b.tar.gz |
Merge branch 'phylib-support-for-MV88X3310-10G-phy'
Russell King says:
====================
net: Add phylib support for MV88X3310 10G phy
This patch series adds support for the Marvell 88x3310 PHY found on
the SolidRun Macchiatobin board.
The first patch introduces a set of generic Clause 45 PHY helpers that
C45 PHY drivers can make use of if they wish.
Patch 2 ensures that the Clause 22 aneg_done function will not be
called for incompatible Clause 45 PHYs.
Patch 3 fixes the aneg restart to be compatible with C45 PHYs - it can
currently only cope with C22 PHYs.
Patch 4 moves the "gen10g" driver into the Clause 45 code, grouping all
core clause 45 code together.
Patch 5 adds the phy_interface_t types for XAUI and 10GBase-KR links.
As 10GBase-KR appears to be compatible with XFI and SFI, XFI and SFI,
I currently see no reason to add XFI and SFI interface modes. There
seems to be vendor code out there using these, but they all alias back
to the same hardware settings.
Patch 6 adds support for the MV88X3310 PHY, which supports both the
copper and fiber interfaces. It should be noted that the MV88X3310
automatically switches its MAC facing interface between 10GBase-KR
and SGMII depending on the negotiated speed. This was discussed with
Florian, and we agreed to update the phy interface mode depending on
the properties of the actual link mode to the PHY.
v2:
- update sysfs-class-net-phydev documentation
- avoid genphy_aneg_done for non-C22 PHYs
- expand comment about 0x30 constant
- add comment about lack of reset
- configure driver using MARVELL_10G_PHY
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/phy.c')
-rw-r--r-- | drivers/net/phy/phy.c | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index 40f4c6a..12548e5 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -149,6 +149,25 @@ static int phy_config_interrupt(struct phy_device *phydev, u32 interrupts) return 0; } +/** + * phy_restart_aneg - restart auto-negotiation + * @phydev: target phy_device struct + * + * Restart the autonegotiation on @phydev. Returns >= 0 on success or + * negative errno on error. + */ +int phy_restart_aneg(struct phy_device *phydev) +{ + int ret; + + if (phydev->is_c45 && !(phydev->c45_ids.devices_in_package & BIT(0))) + ret = genphy_c45_restart_aneg(phydev); + else + ret = genphy_restart_aneg(phydev); + + return ret; +} +EXPORT_SYMBOL_GPL(phy_restart_aneg); /** * phy_aneg_done - return auto-negotiation status @@ -163,6 +182,12 @@ int phy_aneg_done(struct phy_device *phydev) if (phydev->drv && phydev->drv->aneg_done) return phydev->drv->aneg_done(phydev); + /* Avoid genphy_aneg_done() if the Clause 45 PHY does not + * implement Clause 22 registers + */ + if (phydev->is_c45 && !(phydev->c45_ids.devices_in_package & BIT(0))) + return -EINVAL; + return genphy_aneg_done(phydev); } EXPORT_SYMBOL(phy_aneg_done); @@ -1391,7 +1416,7 @@ int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data) /* Restart autonegotiation so the new modes get sent to the * link partner. */ - ret = genphy_restart_aneg(phydev); + ret = phy_restart_aneg(phydev); if (ret < 0) return ret; } @@ -1450,6 +1475,6 @@ int phy_ethtool_nway_reset(struct net_device *ndev) if (!phydev->drv) return -EIO; - return genphy_restart_aneg(phydev); + return phy_restart_aneg(phydev); } EXPORT_SYMBOL(phy_ethtool_nway_reset); |