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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-12-03 08:15:08 -0800
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-12-03 08:15:08 -0800
commite87cb5db0dc357473ac71801051954ddd6ff604f (patch)
treee901e2ed972dfe81af6a61cfb3424d94bad13b82 /drivers/net/phy/marvell.c
parentd894f4510d2155f9136c8c1bb91912481329f6e0 (diff)
parent9ec46c6dae343688ff1136a0899b6a3c5e95e44b (diff)
downloadop-kernel-dev-e87cb5db0dc357473ac71801051954ddd6ff604f.zip
op-kernel-dev-e87cb5db0dc357473ac71801051954ddd6ff604f.tar.gz
Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (48 commits) LIB82596: correct data types for hardware addresses via-velocity: don't oops on MTU change (resend) Stop phy code from returning success to unknown ioctls. SET_NETDEV_DEV() in fec_mpc52xx.c net: smc911x: only enable for mpr2 on sh. e1000: Fix NAPI state bug when Rx complete sky2: turn of dynamic Tx watermark workaround (FE+ only) sky2: don't use AER routines sky2: revert to access PCI config via device space cxgb - fix stats cxgb - fix NAPI cxgb - fix T2 GSO ucc_geth: handle passing of RX-only and TX-only internal delay PHY connection type parameters phylib: marvell: add support for TX-only and RX-only Internal Delay phylib: add PHY interface modes for internal delay for tx and rx only skge: MTU changing fix skge: serial mode register values skge version 1.13 skge: increase TX threshold for Jumbo skge: fiber link up/down fix ...
Diffstat (limited to 'drivers/net/phy/marvell.c')
-rw-r--r--drivers/net/phy/marvell.c26
1 files changed, 17 insertions, 9 deletions
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
index 035fd41..f057407 100644
--- a/drivers/net/phy/marvell.c
+++ b/drivers/net/phy/marvell.c
@@ -143,21 +143,29 @@ static int m88e1111_config_init(struct phy_device *phydev)
int err;
if ((phydev->interface == PHY_INTERFACE_MODE_RGMII) ||
- (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)) {
+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) ||
+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) ||
+ (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) {
int temp;
- if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
- temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
- if (temp < 0)
- return temp;
+ temp = phy_read(phydev, MII_M1111_PHY_EXT_CR);
+ if (temp < 0)
+ return temp;
+ if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
temp |= (MII_M1111_RX_DELAY | MII_M1111_TX_DELAY);
-
- err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
- if (err < 0)
- return err;
+ } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID) {
+ temp &= ~MII_M1111_TX_DELAY;
+ temp |= MII_M1111_RX_DELAY;
+ } else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID) {
+ temp &= ~MII_M1111_RX_DELAY;
+ temp |= MII_M1111_TX_DELAY;
}
+ err = phy_write(phydev, MII_M1111_PHY_EXT_CR, temp);
+ if (err < 0)
+ return err;
+
temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
if (temp < 0)
return temp;
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