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author | David S. Miller <davem@davemloft.net> | 2014-09-19 16:27:13 -0400 |
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committer | David S. Miller <davem@davemloft.net> | 2014-09-19 16:27:13 -0400 |
commit | 77f4f6220a98f4f3eb08be10230d7e8c604aa2b8 (patch) | |
tree | 76f44de1599ba25217e24f3905732010260e0df2 /drivers/net/phy/bcm7xxx.c | |
parent | 2e4e44107176d552f8bb1bb76053e850e3809841 (diff) | |
parent | d8ebfed3f11b62ebc192af3cab64d835ff047e74 (diff) | |
download | op-kernel-dev-77f4f6220a98f4f3eb08be10230d7e8c604aa2b8.zip op-kernel-dev-77f4f6220a98f4f3eb08be10230d7e8c604aa2b8.tar.gz |
Merge branch 'fec-next'
Florian Fainelli says:
====================
net: phy: Broadcom BCM7xxx PHY workaround update
This patch sets the change to of_phy_connect() that you have seen before,
this time with the full context of why it is useful and applicable here.
Due to some design decision, the internal PHY on Broadcom BCM7xxx chips
is not entirely self contained and does not report its internal revision
through MII_PHYSID2, that is left to external PHY designs.
This forces us to get the PHY revision from the GENET and SF2 switch drivers
because those two peripherals integrate such a PHY and do contain the PHY
revision in their registers.
The approach taken here is hopefully easy to extend to similar needs for
other chips/ as well.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/phy/bcm7xxx.c')
-rw-r--r-- | drivers/net/phy/bcm7xxx.c | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/drivers/net/phy/bcm7xxx.c b/drivers/net/phy/bcm7xxx.c index 09dd6e1..daae699 100644 --- a/drivers/net/phy/bcm7xxx.c +++ b/drivers/net/phy/bcm7xxx.c @@ -196,13 +196,22 @@ static int bcm7xxx_eee_enable(struct phy_device *phydev) static int bcm7xxx_28nm_config_init(struct phy_device *phydev) { - int ret; - - ret = bcm7445_config_init(phydev); - if (ret) - return ret; + u8 rev = PHY_BRCM_7XXX_REV(phydev->dev_flags); + u8 patch = PHY_BRCM_7XXX_PATCH(phydev->dev_flags); + int ret = 0; + + dev_info(&phydev->dev, "PHY revision: 0x%02x, patch: %d\n", rev, patch); + + switch (rev) { + case 0xa0: + case 0xb0: + ret = bcm7445_config_init(phydev); + break; + default: + ret = bcm7xxx_28nm_afe_config_init(phydev); + break; + } - ret = bcm7xxx_28nm_afe_config_init(phydev); if (ret) return ret; @@ -257,8 +266,8 @@ static int bcm7xxx_config_init(struct phy_device *phydev) phy_write(phydev, MII_BCM7XXX_AUX_MODE, MII_BCM7XX_64CLK_MDIO); phy_read(phydev, MII_BCM7XXX_AUX_MODE); - /* Workaround only required for 100Mbits/sec */ - if (!(phydev->dev_flags & PHY_BRCM_100MBPS_WAR)) + /* Workaround only required for 100Mbits/sec capable PHYs */ + if (phydev->supported & PHY_GBIT_FEATURES) return 0; /* set shadow mode 2 */ |