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author | Ralf Baechle <ralf@linux-mips.org> | 2007-02-26 19:52:06 +0000 |
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committer | Jeff Garzik <jeff@garzik.org> | 2007-02-27 04:21:25 -0500 |
commit | 908b637fe793165b6aecdc875cdca67c4959a1ad (patch) | |
tree | 6fecf3ac52658a42ea77eb48313ed445a43112e9 /drivers/net/mv643xx_eth.h | |
parent | 92b0c4e240d0768f875bd08d01ec26d87b9546d1 (diff) | |
download | op-kernel-dev-908b637fe793165b6aecdc875cdca67c4959a1ad.zip op-kernel-dev-908b637fe793165b6aecdc875cdca67c4959a1ad.tar.gz |
Alignment in mv643xx_eth
The driver contains this little piece of candy:
#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_NOT_COHERENT_CACHE)
#define ETH_DMA_ALIGN L1_CACHE_BYTES
#else
#define ETH_DMA_ALIGN 8
#endif
Any reason why we're not using dma_get_cache_alignment() instead?
Ralf
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/mv643xx_eth.h')
-rw-r--r-- | drivers/net/mv643xx_eth.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/drivers/net/mv643xx_eth.h b/drivers/net/mv643xx_eth.h index 33c5faf..7cb0a41 100644 --- a/drivers/net/mv643xx_eth.h +++ b/drivers/net/mv643xx_eth.h @@ -42,17 +42,6 @@ #define MAX_DESCS_PER_SKB 1 #endif -/* - * The MV643XX HW requires 8-byte alignment. However, when I/O - * is non-cache-coherent, we need to ensure that the I/O buffers - * we use don't share cache lines with other data. - */ -#if defined(CONFIG_DMA_NONCOHERENT) || defined(CONFIG_NOT_COHERENT_CACHE) -#define ETH_DMA_ALIGN L1_CACHE_BYTES -#else -#define ETH_DMA_ALIGN 8 -#endif - #define ETH_VLAN_HLEN 4 #define ETH_FCS_LEN 4 #define ETH_HW_IP_ALIGN 2 /* hw aligns IP header */ |