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author | Yevgeny Petrilin <yevgenyp@mellanox.co.il> | 2008-10-22 10:25:29 -0700 |
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committer | Roland Dreier <rolandd@cisco.com> | 2008-10-22 10:25:29 -0700 |
commit | 93fc9e1bb6507dde945c2eab68c93e1066ac3691 (patch) | |
tree | aa495ec31b7372580f9ec50acead1d170fd70aab /drivers/net/mlx4/pd.c | |
parent | a3cdcbfa8fb1fccfe48d359da86e99546610c562 (diff) | |
download | op-kernel-dev-93fc9e1bb6507dde945c2eab68c93e1066ac3691.zip op-kernel-dev-93fc9e1bb6507dde945c2eab68c93e1066ac3691.tar.gz |
mlx4_core: Support multiple pre-reserved QP regions
For ethernet support, we need to reserve QPs for the ethernet and
fibre channel driver. The QPs are reserved at the end of the QP
table. (This way we assure that they are aligned to their size)
We need to consider these reserved ranges in bitmap creation, so we
extend the mlx4 bitmap utility functions to allow reserved ranges at
both the bottom and the top of the range.
Signed-off-by: Yevgeny Petrilin <yevgenyp@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/net/mlx4/pd.c')
-rw-r--r-- | drivers/net/mlx4/pd.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/mlx4/pd.c b/drivers/net/mlx4/pd.c index aa61689..26d1a7a 100644 --- a/drivers/net/mlx4/pd.c +++ b/drivers/net/mlx4/pd.c @@ -62,7 +62,7 @@ int mlx4_init_pd_table(struct mlx4_dev *dev) struct mlx4_priv *priv = mlx4_priv(dev); return mlx4_bitmap_init(&priv->pd_bitmap, dev->caps.num_pds, - (1 << 24) - 1, dev->caps.reserved_pds); + (1 << 24) - 1, dev->caps.reserved_pds, 0); } void mlx4_cleanup_pd_table(struct mlx4_dev *dev) @@ -100,7 +100,7 @@ int mlx4_init_uar_table(struct mlx4_dev *dev) return mlx4_bitmap_init(&mlx4_priv(dev)->uar_table.bitmap, dev->caps.num_uars, dev->caps.num_uars - 1, - max(128, dev->caps.reserved_uars)); + max(128, dev->caps.reserved_uars), 0); } void mlx4_cleanup_uar_table(struct mlx4_dev *dev) |