diff options
| author | John Fastabend <john.r.fastabend@intel.com> | 2011-04-04 04:29:41 +0000 |
|---|---|---|
| committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2011-04-13 19:26:43 -0700 |
| commit | e09ad236fc85b1d6e010138f59aba76f6c9a295b (patch) | |
| tree | 7f05239838d579f23a71106d1880155e2359d882 /drivers/net/ixgbe/ixgbe_dcb_82599.h | |
| parent | b776d1043510c60f59220eb5e58b524f5a7f0e52 (diff) | |
| download | op-kernel-dev-e09ad236fc85b1d6e010138f59aba76f6c9a295b.zip op-kernel-dev-e09ad236fc85b1d6e010138f59aba76f6c9a295b.tar.gz | |
ixgbe: DCB, misallocated packet buffer size with X540 device
The X540 device has a smaller packet buffer but the DCB configuration
never took this into account. Under stress this can result in the DMA
engine hanging and TX Unit hang occurring to reset the device. This
patch reworks the packet buffer allocation routine used for DCB on
82599 and X540 devices to account for RX packet buffer sizes.
This fixes the immediate hang. We should consolidate the various
hardware specific routines for configuring features into a single
routine. This will make it much harder to miss feature cases like
this.
Signed-off-by: John Fastabend <john.r.fastabend@intel.com>
Tested-by: Ross Brattain <ross.b.brattain@intel.com>
Tested-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ixgbe/ixgbe_dcb_82599.h')
| -rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb_82599.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82599.h b/drivers/net/ixgbe/ixgbe_dcb_82599.h index 148fd8b..2de71a5 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_82599.h +++ b/drivers/net/ixgbe/ixgbe_dcb_82599.h @@ -92,8 +92,10 @@ #define IXGBE_RXPBSIZE_64KB 0x00010000 /* 64KB Packet Buffer */ #define IXGBE_RXPBSIZE_80KB 0x00014000 /* 80KB Packet Buffer */ #define IXGBE_RXPBSIZE_128KB 0x00020000 /* 128KB Packet Buffer */ +#define IXGBE_TXPBSIZE_MAX 0x00028000 /* 160KB Packet Buffer*/ #define IXGBE_TXPBTHRESH_DCB 0xA /* THRESH value for DCB mode */ +#define IXGBE_TXPKT_SIZE_MAX 0xA /* Max Tx Packet size */ /* SECTXMINIFG DCB */ #define IXGBE_SECTX_DCB 0x00001F00 /* DCB TX Buffer IFG */ |
