diff options
| author | Giuseppe CAVALLARO <peppe.cavallaro@st.com> | 2013-03-26 04:43:07 +0000 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2013-03-26 12:53:36 -0400 |
| commit | 0982a0f6d1be5f03ba62ed1f3deb92e8376b1e43 (patch) | |
| tree | 12c9d08551c6e6a0efcf4ffd17eeca31ad637d01 /drivers/net/ethernet/stmicro/stmmac/common.h | |
| parent | c24602ef86649376e9d71ea808cd877e414d340b (diff) | |
| download | op-kernel-dev-0982a0f6d1be5f03ba62ed1f3deb92e8376b1e43.zip op-kernel-dev-0982a0f6d1be5f03ba62ed1f3deb92e8376b1e43.tar.gz | |
stmmac: start adding pcs and rgmii core irq
This patch starts adding in the main ISR the management of the PCS and
RGMII/SGMII core interrupts. This is to help further development
on this area. Currently the core irq handler only clears the
PCS and S-R_MII interrupts and reports the event in the ethtool stats.
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Tested-by: Byungho An <bh74.an@samsung.com>
Cc: Udit Kumar <udit-dlh.kumar@st.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/stmicro/stmmac/common.h')
| -rw-r--r-- | drivers/net/ethernet/stmicro/stmmac/common.h | 25 |
1 files changed, 14 insertions, 11 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/common.h b/drivers/net/ethernet/stmicro/stmmac/common.h index 8a04b7f..479f479 100644 --- a/drivers/net/ethernet/stmicro/stmmac/common.h +++ b/drivers/net/ethernet/stmicro/stmmac/common.h @@ -140,6 +140,10 @@ struct stmmac_extra_stats { unsigned long l3_filter_match; unsigned long l4_filter_match; unsigned long l3_l4_filter_no_match; + /* PCS */ + unsigned long irq_pcs_ane_n; + unsigned long irq_pcs_link_n; + unsigned long irq_rgmii_n; }; /* CSR Frequency Access Defines*/ @@ -217,16 +221,14 @@ enum dma_irq_status { handle_tx = 0x8, }; -enum core_specific_irq_mask { - core_mmc_tx_irq = 1, - core_mmc_rx_irq = 2, - core_mmc_rx_csum_offload_irq = 4, - core_irq_receive_pmt_irq = 8, - core_irq_tx_path_in_lpi_mode = 16, - core_irq_tx_path_exit_lpi_mode = 32, - core_irq_rx_path_in_lpi_mode = 64, - core_irq_rx_path_exit_lpi_mode = 128, -}; +#define CORE_IRQ_TX_PATH_IN_LPI_MODE (1 << 1) +#define CORE_IRQ_TX_PATH_EXIT_LPI_MODE (1 << 2) +#define CORE_IRQ_RX_PATH_IN_LPI_MODE (1 << 3) +#define CORE_IRQ_RX_PATH_EXIT_LPI_MODE (1 << 4) + +#define CORE_PCS_ANE_COMPLETE (1 << 5) +#define CORE_PCS_LINK_STATUS (1 << 6) +#define CORE_RGMII_IRQ (1 << 7) /* DMA HW capabilities */ struct dma_features { @@ -355,7 +357,8 @@ struct stmmac_ops { /* Dump MAC registers */ void (*dump_regs) (void __iomem *ioaddr); /* Handle extra events on specific interrupts hw dependent */ - int (*host_irq_status) (void __iomem *ioaddr); + int (*host_irq_status) (void __iomem *ioaddr, + struct stmmac_extra_stats *x); /* Multicast filter setting */ void (*set_filter) (struct net_device *dev, int id); /* Flow control setting */ |
