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authorSergei Shtylyov <sergei.shtylyov@cogentembedded.com>2018-03-24 23:11:19 +0300
committerDavid S. Miller <davem@davemloft.net>2018-03-26 12:34:19 -0400
commitce9134dff6d90c9f9c6bfd3d32dffdadf8a8e668 (patch)
tree31d1d20a17f55a093aa04a762c84b1064443e880 /drivers/net/ethernet/renesas/sh_eth.h
parent246e30cc4fd8db8390e83617fa5ff29ad5280ad9 (diff)
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sh_eth: add sh_eth_cpu_data::no_tx_cntrs flag
RZ/A1H (R7S72100) Ether controller doesn't seem to have the TX counter registers like TROCR/CDCR/LCCR (or at least they are still undocumented like some TSU registers), so we bail out of sh_eth_get_stats() early in this case. Currently we are calling sh_eth_is_rz_fast_ether() in order to check for this, but it would be simpler to check the new 'no_tx_cntrs' bitfield in the 'struct sh_eth_cpu_data'; then we'd be able to remove sh_eth_is_rz_fast_ether() as there would be no callers left... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/renesas/sh_eth.h')
-rw-r--r--drivers/net/ethernet/renesas/sh_eth.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/net/ethernet/renesas/sh_eth.h b/drivers/net/ethernet/renesas/sh_eth.h
index 25c0b1d..7ea162a 100644
--- a/drivers/net/ethernet/renesas/sh_eth.h
+++ b/drivers/net/ethernet/renesas/sh_eth.h
@@ -514,6 +514,7 @@ struct sh_eth_cpu_data {
unsigned rmiimode:1; /* EtherC has RMIIMODE register */
unsigned rtrate:1; /* EtherC has RTRATE register */
unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */
+ unsigned no_tx_cntrs:1; /* EtherC DOES NOT have TX error counters */
unsigned dual_port:1; /* Dual EtherC/E-DMAC */
};
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